參數(shù)資料
型號(hào)： OPA860IDR
元件分類(lèi)： 跨導(dǎo)放大器
英文描述： Wide Bandwidth OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) and BUFFER
中文描述： 寬帶運(yùn)算跨導(dǎo)放大器（OTA）和緩沖區(qū)
文件頁(yè)數(shù)： 24/29頁(yè)
文件大?。?/td> 613K
代理商： OPA860IDR
www.ti.com
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
A printed circuit board (PCB) is available to assist in
the initial evaluation of circuit performance using the
OPA860. This module is available free, as an
unpopulated PCB delivered with descriptive docu-
mentation. The summary information for the board is
shown below:
e
O
e
2
n
R
S
i
bn
2
4kTR
S
R
L
R
G
1
gm
2
R
G
i
bi
2
4kTR
G
R
L
1
gm
MACROMODELS AND APPLICATIONS
SUPPORT
Computer simulation of circuit performance using
SPICE is often useful when analyzing the perform-
ance of analog circuits and systems. This principle is
particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have
a major effect on circuit performance. A SPICE model
for the OPA860 is available through the Texas
Instruments web page (
www.ti.com
). These models
do a good job of predicting small-signal AC and
transient
performance
under
operating conditions. They do not do as well in
predicting the harmonic distortion. These models do
not attempt to distinguish between the package types
in their small-signal AC performance.
e
n
i
n
R
S
√
4kTR
S
V
O
e
O
e
2
n
i
n
R
S
2
4kTR
S
(13)
THERMAL ANALYSIS
Due to the high output power capability of the
OPA860, heatsinking or forced airflow may be re-
quired under extreme operating conditions. Maximum
desired junction temperature will set the maximum
allowed internal power dissipation as described be-
low. In no case should the maximum junction tem-
perature be allowed to exceed 150
°
C.
Operating junction temperature (T
J
) is given by
T
A
+ P
D
×θ
JA
. The total internal power dissipation (P
D
)
is the sum of quiescent power (P
DQ
) and additional
power dissipated in the output stage (P
DL
) to deliver
load power. Quiescent power is simply the specified
no-load supply current times the total supply voltage
across the part. P
DL
will depend on the required
output signal and load but would, for a grounded
resistive load, be at a maximum when the output is
fixed at a voltage equal to 1/2 of either supply voltage
(for equal bipolar supplies). Under this condition,
P
DL
= V
S2
/(4
×
R
L
) where R
L
includes feedback
network loading.
NOISE PERFORMANCE
The OTA noise model consists of three elements: a
voltage noise on the B-input; a current noise on the
B-input; and a current noise on the E-input.
Figure 62
shows the OTA noise analysis model with all the
noise terms included. In this model, all noise terms
are taken to be noise voltage or current density terms
in either nV/
√
Hz or pA/
√
Hz.
e
n
i
bn
i
bi
R
S
R
G
√
4kTR
S
√
4kTR
S
R
L
V
O
OPA860
SBOS331–JUNE 2005
The total output spot noise voltage can be computed
as the square root of the sum of all squared output
noise voltage contributors.
Equation 12
shows the
general form for the output noise voltage using the
terms shown in
.
Note that it is the power in the output stage and not
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