參數資料
型號: NDS331
廠商: Fairchild Semiconductor Corporation
英文描述: N-Channel Logic Level Enhancement Mode Field Effect Transistor
中文描述: N溝道增強模式的邏輯電平場效應晶體管
文件頁數: 3/6頁
文件大?。?/td> 59K
代理商: NDS331
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
V
SD
Maximum Continuous Drain-Source Diode Forward Current
0.42
A
Maximum Pulsed Drain-Source Diode Forward Current
10
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.42 A
(Note 2)
0.8
1.2
V
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
P
D
(
t
) =
T
J
T
A
R
θ
J A
(
t
)
=
T
J
T
A
R
θ
J C
+
R
θ
CA
(
t
)
=
I
D
2
(
t
) ×
R
DS
(
ON
)
T
J
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250
o
C/W when mounted on a 0.02 in
2
pad of 2oz copper.
b. 270
o
C/W when mounted on a 0.001 in
2
pad of 2oz copper.
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
Scale 1 : 1 on letter size paper
NDS331N Rev.E
1a
1b
相關PDF資料
PDF描述
NDS331N N-Channel Logic Level Enhancement Mode Field Effect Transistor
NDS332 P-Channel Logic Level Enhancement Mode Field Effect Transistor
NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor
NDS335 N-Channel Logic Level Enhancement Mode Field Effect Transistor
NDS335N N-Channel Logic Level Enhancement Mode Field Effect Transistor
相關代理商/技術參數
參數描述
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