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參數(shù)資料
| 型號(hào)： | NCV8512PW50G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 5.0 V Micropower 150 mA LDO Linear Regulator with DELAY, Adjustable RESET, and Monitor FLAG |
| 中文描述： | 5 V FIXED POSITIVE LDO REGULATOR, 0.6 V DROPOUT, PDSO16 |
| 封裝： | LEAD FREE, SOIC-16 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大?。?/td> | 106K |
| 代理商： | NCV8512PW50G |
NCV8512
http://onsemi.com
7
CIRCUIT DESCRIPTION
Figure 11. Reset and Delay Circuit Wave Forms
V
IN
1.8V V
DT
0.45V V
LD
V
OUT
DELAY
RESET
RESET Threshold
Td
Td
Power on
Reset
Input
V Dip
Undervoltage
Secondary
Spike
Output
Overload
REGULATOR CONTROL FUNCTIONS
The NCV8512 contains a microprocessorcompatible
control function RESET (Figure 11).
RESET Function
A RESET signal (low voltage) is generated as the IC
powers up. After V
OUT
increases above the RESET
threshold, the DELAY timer is started. When the DELAY
timer passes 1.8 V, the RESET signal goes high. A discharge
of the DELAY timer is started when V
OUT
drops and stays
below the RESET threshold. When the DELAY timer level
drops below 0.45 V, the RESET signal is brought low.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for V
OUT
as low
as 1.0 V.
Adjustable Reset Function
The reset threshold VRL can be decreased from a typical
value of 4.65 V to as low as 3.5 V by using an external
voltage divider connected from V
OUT
to the pin R
ADJ
as
displayed in Figure 12. The resistor divider keeps the
voltage above the V
RADJ.TH
(typical 1.31 V) and overrides
the internal threshold detector. Adjust the voltage divider
according to the following relationship:
VTHRES
VRADJ.TH
RADJ1
RADJ2
RADJ2
(2)
Where;
V
THRES
is the desired output threshold voltage that starts
the time delay for Power on Reset Delay.
V
RADJ.TH
is the default threshold voltage of 1.31 V typ.
R
ADJ1
is the resistor connected from the 5 V output to the
R
ADJ
pin.
R
ADJ2
is the resistor connected from the R
ADJ
pin to
ground.
If the reset adjust option is not needed, the R
ADJ
pin
should be connected to GND causing the reset threshold to
go to its default value (4.65 V typical).
As an example, select resistors to give a threshold voltage
of 4.0 V. This will allow the delay timer to start when the
output crosses the 4.0 V level.
V
THRES
= 4.0 V = 1.31 V x (R
ADJ1
+ R
ADJ2
) / R
ADJ2
Let R
ADJ2
be 100 k for low current consumption.
R
ADJ1
= 2.05 x 100 k = 205 k
With 5 V on the output, the voltage on the R
ADJ
be 1.64 V.
Figure 12. Adjustable RESET
R
ADJ
to P and
System
Power
R
RST
V
OUT
C
OUT
RESET
C
DELAY
6.4 V
Delay
NCV8512
to P and
RESET
Port
R
ADJ1
R
ADJ2
DELAY Function
The reset delay circuit provides a delay (programmable by
external capacitor) on the RESET output lead.
The DELAY lead provides source current (typically 9 A)
to the external DELAY capacitor at the following times:
1. During Power Up (once the regulation threshold
has been exceeded).
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|---|---|
| NCV8512PW50R2G | 功能描述:低壓差穩(wěn)壓器 - LDO 5V MICROPOWER 150mA LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| NCV8518 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:AC-DC Offline Switching Controllers/Regulators |
| NCV8518A | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Low Dropout Linear Regulator with Watchdog, Wake Up, RESET, and ENABLE |
| NCV8518APDG | 功能描述:低壓差穩(wěn)壓器 - LDO LINEAR VLT REGULATOR RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| NCV8518APDR2G | 功能描述:低壓差穩(wěn)壓器 - LDO LINEAR VLT REGULATOR RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
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