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參數(shù)資料
| 型號(hào)： | MT4LC4M16R6 |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | DRAM |
| 中文描述： | 內(nèi)存 |
| 文件頁(yè)數(shù)： | 9/19頁(yè) |
| 文件大小： | 339K |
| 代理商： | MT4LC4M16R6 |
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9
4 Meg x 16 FPM DRAM
D28_2.p65 – Rev. 5/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
4 MEG x 16
FPM DRAM
NOTES (continued)
30. Last rising CASx# edge to next cycle’s last rising
CASx# edge.
31. Last rising CASx# edge to first falling CASx#
edge.
32. First DQs controlled by the first CASx# to go
LOW.
33. Last DQs controlled by the last CASx# to go
HIGH.
34. Each CASx# must meet minimum pulse width.
35. Last CASx# to go LOW.
36. All DQs controlled, regardless CASL# and CASH#.
37. V
IH
overshoot: V
IH
(MAX ) = V
CC
+ 2V for a pulse
width
￡
3ns, and the pulse width cannot be
greater than one third of the cycle rate. V
IL
undershoot: V
IL
(MIN) = -2V for a pulse width
￡
3ns, and the pulse width cannot be greater than
one third of the cycle rate.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MT4LC4M16R6-1 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DRAM |
| MT4LC4M16R6TG5 | 制造商:Micron Technology Inc 功能描述: |
| MT4LC4M16R6TG-5 | 制造商:Micron Technology Inc 功能描述: |
| MT4LC4M16R6TG-5S | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DRAM |
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