93
ATmega16M1/32M1/64M1 [DATASHEET]
8209E–AVR–11/2012
Bits 1:0 – WGM01:0: Waveform Generating mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting sequence of the
counter, the source for maximum (TOP) counter value, and what type of waveform generating to be used, see
Table 14-8. Modes of operation supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on
Compare Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes (see
“Modes of operation”Notes:
1. MAX
= 0xFF.
2. BOTTOM = 0x00.
14.9.2
TCCR0B – Timer/Counter Control Register B
Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when
operating in PWM mode. When writing a logical one to the FOC0A bit, an immediate Compare Match is forced on
the Waveform Generating unit. The OC0A output is changed according to its COM0A1:0 bits setting. Note that the
FOC0A bit is implemented as a strobe. Therefore it is the value present in the COM0A1:0 bits that determines the
effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0A as TOP.
The FOC0A bit is always read as zero.
Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when
operating in PWM mode. When writing a logical one to the FOC0B bit, an immediate Compare Match is forced on
the Waveform Generating unit. The OC0B output is changed according to its COM0B1:0 bits setting. Note that the
Table 14-8.
Waveform Generating mode bit description.
Mode
WGM02
WGM01
WGM00
Timer/Counter
mode of
operation
TOP
Update of
OCRx at
TOV flag
set on
0
Normal
0xFF
Immediate
MAX
1
001
PWM, Phase
Correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
Fast PWM
0xFF
TOP
MAX
4
100
Reserved
–
5
101
PWM, Phase
Correct
OCRA
TOP
BOTTOM
6
110
Reserved
–
7
111
Fast PWM
OCRA
TOP
Bit
7
6
5
4
3
210
FOC0A
FOC0B
–
WGM02
CS02
CS01
CS00
TCCR0B
Read/write
W
R
R/W
Initial value
0