參數(shù)資料
型號(hào)： MPC9239FNR2
廠商： MOTOROLA INC
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 900 MHz, OTHER CLOCK GENERATOR, PQCC28
封裝： PLASTIC, LCC-28
文件頁(yè)數(shù)： 5/9頁(yè)
文件大?。?/td> 136K
代理商： MPC9239FNR2
4
MPC9239
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
421
Table 6. DC CHARACTERISTICS (VCC = 3.3V ± 5%, TA = 0°C to + 70°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
LVCMOS control inputs (FREF_EXT, PWR_DOWN, XTAL_SEL, P_LOAD, S_LOAD, S_DATA, S_CLOCK, M[0:8], N[0:1], OE)
VIH
Input High Voltage
2.0
VCC + 0.3
V
LVCMOS
VIL
Input Low Voltage
0.8
V
LVCMOS
IIN
Input Currenta
±200
A
VIN = VCC or GND
Differential clock output FOUTb
VOH
Output High Voltagec
VCC–1.02
VCC–0.74
V
LVPECL
VOL
Output Low Voltagec
VCC–1.95
VCC–1.60
V
LVPECL
Test and diagnosis output TEST
VOH
Output High Voltage
2.0
V
IOH =-0.8 mA
VOL
Output Low Voltage
0.55
V
IOL = 0.8 mA
Supply current
ICC_PLL
Maximum PLL Supply Current
20
mA
VCC_PLL Pins
ICC
Maximum Supply Current
62
110
mA
All VCC Pins
a. Inputs have pull-down resistors affecting the input current.
b. Outputs terminated 50
to VTT = VCC - 2V.
c. The MPC9239 FOUT output levels are compatible to the MC12439 output levels. The MPC9239 is capable of driving 25
W loads.
Table 7. AC CHARACTERISTICS (VCC = 3.3V ± 5%, TA = 0°C to + 70°C)a
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fXTAL
Crystal interface frequency range
10
20
MHz
fVCO
VCO frequency rangeb
800
1800
MHz
fMAX
Output Frequency
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
400
200
100
50
900
450
225
112.5
MHz
PWR_DOWN = 0
fS_CLOCK
Serial interface programming clock frequencyc
0
10
MHz
tP,MIN
Minimum pulse width
(S_LOAD, P_LOAD)
50
ns
DC
Output duty cycle
45
50
55
%
tr, tf
Output Rise/Fall Time
0.05
0.3
ns
20% to 80%
tS
Setup Time
S_DATA to S_CLOCK
S_CLOCK to S_LOAD
M, N to P_LOAD
20
ns
tS
Hold Time
S_DATA to S_CLOCK
M, N to P_LOAD
20
ns
tJIT(CC)
Cycle-to-cycle jitter
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
60
90
120
160
ps
tJIT(PER)
Period Jitter
N = 11 (
÷1)
N = 00 (
÷2)
N = 01 (
÷4)
N = 10 (
÷8)
40
65
90
120
ps
tLOCK
Maximum PLL Lock Time
10
ms
a. AC characteristics apply for parallel output termination of 50
to VTT.
b. The input frequency fXTAL and the PLL feedback divider M must match the VCO frequency range: fVCO = fXTAL 2 M.
c. The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when
used as test clock in test mode 6. See application section for more details.
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