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| 型號： | MPC862 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Hardware Specifications |
| 中文描述： | 硬件規(guī)格 |
| 文件頁數(shù)： | 2/88頁 |
| 文件大?。?/td> | 1104K |
| 代理商： | MPC862 |
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2
MPC862/857T/857DSL Hardware Specifications
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Features
Table 1 shows the functionality supported by the members of the MPC862/857T/857DSL family.
2
Features
The following list summarizes the key MPC862/857T/857DSL features:
Embedded single-issue, 32-bit MPC8xx core (implementing the PowerPC architecture) with
thirty-two 32-bit general-purpose registers (GPRs)
— The core performs branch prediction with conditional prefetch, without conditional execution
— 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1).
– 16-Kbyte instruction cache (MPC862P) is four-way, set-associative with 256 sets; 4-Kbyte
instruction cache (MPC862T, MPC857T, and MPC857DSL) is two-way, set-associative
with 128 sets.
– 8-Kbyte data cache (MPC862P) is two-way, set-associative with 256 sets; 4-Kbyte data
cache (MPC862T, MPC857T, and MPC857DSL) is two-way, set-associative with 128 sets.
– Cache coherency for both instruction and data caches is maintained on 128-bit (4-word)
cache blocks.
– Caches are physically addressed, implement a least recently used (LRU) replacement
algorithm, and are lockable on a cache block basis.
— MMUs with 32-entry TLB, fully associative instruction and data TLBs
— MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address
spaces and 16 protection groups
— Advanced on-chip-emulation debug mode
The MPC862/857T/857DSL provides enhanced ATM functionality over that of the MPC860SAR.
The MPC862/857T/857DSL adds major new features available in “enhanced SAR” (ESAR) mode,
including the following:
— Improved operation, administration and maintenance (OAM) support
— OAM performance monitoring (PM) support
— Multiple APC priority levels available to support a range of traffic pace requirements
— ATM port-to-port switching capability without the need for RAM-based microcode
— Simultaneous MII (10/100Base-T) and UTOPIA (half-duplex) capability
Table 1. MPC862 Family Functionality
Part
Cache
Ethernet
SCC SMC
Instruction
Cache
Data Cache
10T
10/100
MPC862P
16 Kbyte
8 Kbyte
Up to 4
1
4
2
MPC862T
4 Kbyte
4 Kbyte
Up to 4
1
4
2
MPC857T
4 Kbyte
4 Kbyte
1
1
1
2
MPC857DSL
4 Kbyte
4 Kbyte
1
1
1
1
1
On the MPC857DSL, the SCC (SCC1) is for ethernet only. Also, the MPC857DSL does
not support the Time Slot Assigner (TSA).
On the MPC857DSL, the SMC (SMC1) is for UART only.
1
2
2
F
Freescale Semiconductor, Inc.
n
.
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