• 參數(shù)資料
    型號: MPC755CPX400LE
    廠商: Freescale Semiconductor
    文件頁數(shù): 3/56頁
    文件大?。?/td> 0K
    描述: IC MPU PPC 400MHZ 360-FCPBGA
    標準包裝: 44
    系列: MPC7xx
    處理器類型: 32-位 MPC7xx PowerPC
    速度: 400MHz
    電壓: 2V
    安裝類型: 表面貼裝
    封裝/外殼: 360-BBGA,F(xiàn)CCBGA
    供應(yīng)商設(shè)備封裝: 360-FCCBGA(25x25)
    包裝: 托盤
    MPC755 RISC Microprocessor Hardware Specifications, Rev. 8
    Freescale Semiconductor
    11
    Electrical and Thermal Characteristics
    Table 7 provides the power consumption for the MPC755.
    Capacitance, Vin = 0 V, f = 1 MHz
    Cin
    5.0
    pF
    3, 4
    Notes:
    1. Nominal voltages; see Table 3 for recommended operating conditions.
    2. For processor bus signals, the reference is OVDD while L2OVDD is the reference for the L2 bus signals.
    3. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK) and IEEE 1149.1 boundary scan (JTAG) signals.
    4. Capacitance is periodically sampled rather than 100% tested.
    5. The leakage is measured for nominal OVDD and VDD, or both OVDD and VDD must vary in the same direction (for example,
    both OVDD and VDD vary by either +5% or –5%).
    Table 7. Power Consumption for MPC755
    Processor (CPU) Frequency
    Unit
    Notes
    300 MHz
    350 MHz
    400 MHz
    Full-Power Mode
    Typical
    3.1
    3.6
    5.4
    W
    1, 3, 4
    Maximum
    4.5
    6.0
    8.0
    W
    1, 2
    Doze Mode
    Maximum
    1.8
    2.0
    2.3
    W
    1, 2, 4
    Nap Mode
    Maximum
    1.0
    W
    1, 2, 4
    Sleep Mode
    Maximum
    550
    mW
    1, 2, 4
    Sleep Mode (PLL and DLL Disabled)
    Maximum
    510
    mW
    1, 2
    Notes:
    1. These values apply for all valid processor bus and L2 bus ratios. The values do not include I/O supply power (OVDD and
    L2OVDD) or PLL/DLL supply power (AVDD and L2AVDD). OVDD and L2OVDD power is system dependent, but is typically
    <10% of VDD power. Worst case power consumption for AVDD = 15 mW and L2AVDD = 15 mW.
    2. Maximum power is measured at nominal VDD (see Table 3) while running an entirely cache-resident, contrived sequence of
    instructions which keep the execution units maximally busy.
    3. Typical power is an average value measured at the nominal recommended VDD (see Table 3) and 65°C in a system while
    running a typical code sequence.
    4. Not 100% tested. Characterized and periodically sampled.
    Table 6. DC Electrical Specifications (continued)
    At recommended operating conditions (see Table 3)
    Characteristic
    Nominal
    Bus
    Voltage 1
    Symbol
    Min
    Max
    Unit
    Notes
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