參數(shù)資料
型號(hào): MPC5602PEF0MLL6R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件頁數(shù): 88/95頁
文件大?。?/td> 1694K
代理商: MPC5602PEF0MLL6R
MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
89
3
16 Dec 2010 “Introduction” section:
Changed title (was “Overview“)
Updated contents
“MPC5602P device comparison” table:
Added sentence above table
Removed “FlexRay” row
“MPC5602P block diagram”: added the following blocks: MC_CGM, MC_ME, MC_PCU,
MC_RGM, CRC, and SSCM
Added “MPC5602P series block summary” table
“Pin muxing” section: removed information on “Symmetric pads”
“Electrical characteristics” section:
Updated “Caution” note
Demoted “NVUSRO register” section to subsection of “DC electrical characteristics”
section
“NVUSRO register” section: deleted “NVUSRO[WATCHDOG_EN] field description“
section
Updated “EMI testing specifications” table
“Low voltage monitor electrical characteristics” table: updated VMLVDDOK_H max value
“DC electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0)” table: removed VOL_SYM,
and VOH_SYM rows
“Supply current (5.0 V, NVUSRO[PAD3V5V] = 0)” table:
IDD_LV_CORE, RUN—Maximum mode, 40/64 MHz: updated typ/max values
IDD_LV_CORE, RUN—Airbag mode, 40/64 MHz: updated typ/max values
IDD_LV_CORE, RUN—Maximum mode, “P” parameter classification: removed
IDD_FLASH: removed rows
IDD_ADC, Maximum mode: updated typ/max values
IDD_OSC: updated max value
Updated “DC electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1)” table
“Supply current (3.3 V, NVUSRO[PAD3V5V] = 1)” table:
IDD_LV_CORE, RUN—Maximum mode, 40/64 MHz: updated typ/max values
IDD_LV_CORE, RUN—Airbag mode, 40/64 MHz: updated typ/max values
IDD_FLASH: removed rows
IDD_ADC, Maximum mode: updated typ/max values
IDD_OSC: updated max value
Added “I/O consumption” table
Removed “I/O weight” table
Updated “Main oscillator electrical characteristics (5.0 V, NVUSRO[PAD3V5V] = 0)” table
Updated “Main oscillator electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1)” table
“Input clock characteristics” table: updated fCLK max value
“PLLMRFM electrical specifications (VDDPLL = 1.08 V to 1.32 V, VSS = VSSPLL = 0 V,
TA =TL to TH)” table:
Updated supply voltage range for VDDPLL in the table title
Updated fSCM max value
Updated CJITTER row
Updated fMOD max value
Updated “16 MHz RC oscillator electrical characteristics” table
Updated “ADC conversion characteristics” table
Table 40. Revision history (continued)
Revision
Date
Description of
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