參數(shù)資料
型號： MPC5602F0VLL4
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件頁數(shù)： 23/95頁
文件大?。?/td> 1694K
代理商： MPC5602F0VLL4
MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
3
1
Introduction
1.1
Document overview
This document provides electrical specifications, pin assignments, and package diagrams for the MPC5601P/2P series of
microcontroller units (MCUs). It also describes the device features and highlights important electrical and physical
characteristics. For functional characteristics, refer to the device reference manual.
1.2
Description
This 32-bit system-on-chip (SoC) automotive microcontroller family is the latest achievement in integrated automotive
application controllers. It belongs to an expanding range of automotive-focused products designed to address chassis
applications—specifically, electrical hydraulic power steering (EHPS) and electric power steering (EPS)—as well as airbag
applications.
This family is one of a series of next-generation integrated automotive microcontrollers based on the Power Architecture
technology.
The advanced and cost-efficient host processor core of this automotive controller family complies with the Power Architecture
embedded category. It operates at speeds of up to 64 MHz and offers high performance processing optimized for low power
consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported
with software drivers, operating systems and configuration code to assist with users implementations.
1.3
Device comparison
Table 1 provides a summary of different members of the MPC5602P family and their features to enable a comparison among
the family members and an understanding of the range of functionality offered within this family.
Table 1. MPC5602P device comparison
Feature
MPC5601P
MPC5602P
Code flash memory (with ECC)
192 KB
256 KB
Data flash memory / EE option (with ECC)
64 KB (optional feature)
SRAM (with ECC)
12 KB
20 KB
Processor core
32-bit e200z0h
Instruction set
VLE (variable length encoding)
CPU performance
0–64 MHz
FMPLL (frequency-modulated phase-locked loop) module
1
INTC (interrupt controller) channels
120
PIT (periodic interrupt timer)
1 (with four 32-bit timers)
eDMA (enhanced direct memory access) channels
16
FlexCAN (controller area network)
21,2
Safety port
Yes (via FlexCAN module)
Yes (via second FlexCAN
module)
FCU (fault collection unit)
Yes
CTU (cross triggering unit)
No
Yes
eTimer
1 (16-bit, 6 channels)
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