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參數(shù)資料
| 型號： | MPC184VFB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA252 |
| 封裝： | MAPBGA-252 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 426K |
| 代理商： | MPC184VFB |
MPC184 PCI Mode Hardware Reference Manual
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Overview
1 Overview
The MPC184 is a exible and powerful addition to any networking or computing system using the Motorola
PowerQUICC line of integrated communications processors, or any system supporting the PCI bus protocol.
The MPC184 is designed to off load computationally intensive security functions, such as key generation
and exchange, authentication, and bulk encryption from the host processor.
The MPC184 is optimized to process all the algorithms associated with IPSec, IKE, WTLS/WAP and
SSL/TLS. In addition, the Motorola family of security co-processors are the only devices on the market
capable of executing elliptic curve cryptography which is especially important for secure wireless
communications.
MPC184 features include the following:
1 Public key execution units (PKEUs) that support the following:
— RSA and Dife-Hellman
– Programmable eld size up to 2048-bits
— Elliptic curve cryptography
–F2m and F(p) modes
– Programmable eld size up to 511-bits
1 Data Encryption Standard execution units (DEUs)
— DES, 3DES
— Two key (K1, K2, K1) or Three Key (K1, K2, K3)
— ECB and CBC modes for both DES and 3DES
1 Advanced Encryption Standard unit (AESU)
— Implements the Rinjdael symmetric key cipher
— Implements ECB, CBC and Counter modes
1 ARC Four execution unit (AFEU)
— Implements a stream cipher compatible with the RC4 algorithm
— 40- to 128-bit programmable key
1 Message digest execution units (MDEUs)
— SHA-1 with 160-bit or 256-bit message digest
— MD5 with 128-bit message digest
— HMAC with either algorithm
1 Random number generator (RNG)
8xx compliant external bus interface, with master/slave logic.
— 32-bit address/32 -bit data
— 75 MHz operation
PCI 2.2 compliant external bus interface, with master/slave logic
— 32-bit address/32-bit data mode, 66MHz
4 Crypto-channels, each supporting multi-command descriptor chains
— Static and/or dynamic assignment of crypto-execution units via an integrated controller
8KB of internal scratchpad memory for key, IV and context storage
1.5V supply, 3.3V I/O
252 MAP BGA
1.0W power dissipation
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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