參數(shù)資料
型號(hào): MPC184VFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA252
封裝: MAPBGA-252
文件頁(yè)數(shù): 13/16頁(yè)
文件大?。?/td> 426K
代理商: MPC184VFB
MPC184 PCI Mode Hardware Reference Manual
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Signal Descriptions
SERR#
T10
O
O/D
System Error is active low when unrecoverable
system error is detected.
PERR#
R10
I/O
S/T/S
Parity Error is active low when Parity Error is
detected
Interrupt Signals (1)
INTA#
D1
O
O/D
Interrupt Request
JTAG/Boundary Scan (5)
TCK
A3
I
Test Clock
If JTAG is NOT used, this pin must be tied to VSS
TDI
C1
I
Test Input
If JTAG is NOT used, this pin must be tied to
OVDD
TDO
B1
O
Test output
If JTAG is NOT used, this pin must be NC
TMS
A2
I
Test Mode Select
If JTAG is NOT used, this pin must be tied to
OVDD
TRST#
A4
I
Test Reset
If JTAG is NOT used, this pin must be tied to VSS
Powers/Grounds/No Connects (195)
Analog
VDD
F2
Analog PLL Power
MPC184 = +1.5 V
MPC190 = +1.8 V
AVSS
H2
Analog PLL Ground
VSS
B2, B3, B4, C2, C3, C4, C5, C7,
C10, C12, C13, C14, D3, E14, F6,
F7, F8, F9, F10, F11, F14, G1, G3,
G6, G7, G8, G9, G10, G11, H6,
H7, H8, H9, H10, H11, J1, J2, J6,
J7, J8, J9, J10, J11, J14, K6, K7,
K8, K9, K10, K11, L3, L6, L7, L8,
L9, L10, L11, M14, N3, P3, P4, P6,
P7, P9, P11, P12, P13, P14, R3,
R4
Ground
IVDD
E5, E6, E7, E8, E9, E10, E11, E12,
F5, F12, G5, G12, H5, H12, J5,
J12, K5, K12, L5, L12, M5, M6, M7,
M8, M9, M10, M11, M12
Core Power
MPC184 = +1.5 V
MPC190 = +1.8 V
Table 2. Signal Descriptions (continued)
Signal
Name
Pin
Locations
Signal
Type
Description
F
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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