參數(shù)資料
型號(hào)： MN195007
廠商： PANASONIC CORP
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-BIT, 24.576 MHz, OTHER DSP, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 18/30頁(yè)
文件大?。?/td> 280K
代理商： MN195007
MN195007 Hardware Specifications
Panasonic Communications Co., Ltd.
-
25 -
6.1.2 Type 3 Interface register
Type 3 interface register is a physical interface between Host CPU and modem program.
These registers constructed with 15 lines of 8 bit register and are connected with odd
addresses.
Register map is mentioned in [ Table 16 ].
Address
Register Name
R/W
Description
000
|
7FF
DPRAM
Area
---
800
RXDR
R
Receive Data Register
802
TXDR
R/W
Transmit Data Register
804
CMDR1
R/W
Command Register 1
806
CMDR2
R/W
Command Register 2
808
STSR1
R
Status Register 1
80A
EGSL1
R/W
Interrupt Edge Control Register for Status Register 1
80C
T3IRQ1EN
R/W
Interrupt Control Register for Status Register 1
80E
T3IRQ1DET
R/W
Interrupt Accept Register for Status Register 1
810
STSR2
R
Status Register 2
814
T3IRQ2EN
R/W
Interrupt Control Register for Status Register 2
816
T3IRQ2DET
R
Interrupt Accept Register for Status Register 2
818
STSR3
R
Status Register 3
81A
EGSL3
R/W
Interrupt Edge Control Register for Status Register 3
81C
T3IRQ3EN
R/W
Interrupt Control Register for Status Register 3
81E
T3IRQ3DET
R/W
Interrupt Accept Register for Status Register 3
[ Table 16 ] Type 3 interface Register Map
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