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參數(shù)資料
| 型號： | MK3200SLF |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 0.032768 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大?。?/td> | 144K |
| 代理商： | MK3200SLF |
32.768 kHz Clock Oscillator
MDS 3200 D
3
Revision 022306
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3200
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a
commonly used trace impedance), place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
MK3200 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01F must be connected
between VDD and the PCB ground plane.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via. Distance of the
ferrite bead and bulk decoupling from the device is less
critical.
2) To minimize EMI, the 33
series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the MK3200. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
4) The input crystal must be connected as close to the
chip as possible. The input crystal should be a parallel
mode crystal with a 12 pF load capacitance.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK3230-01S | 80 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3230-01S | 80 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3230-01SLF | 80 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3234-01S | 50 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3234-01SLF | 50 MHz, OTHER CLOCK GENERATOR, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK3200SLFTR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 32.768KHZ CLOCK OSCILLATOR RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MK3200STR | 功能描述:IC CLOCK OSC 32.768KHZ 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK320S | 制造商:ASTRODYNE 制造商全稱:Astrodyne Corporation 功能描述:Compact 300 Watt Enclosed Switching Power Supplies |
| MK320S-12 | 制造商:ASTRODYNE 制造商全稱:Astrodyne Corporation 功能描述:Compact 300 Watt Enclosed Switching Power Supplies |
| MK320S-15 | 制造商:ASTRODYNE 制造商全稱:Astrodyne Corporation 功能描述:Compact 300 Watt Enclosed Switching Power Supplies |
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