參數(shù)資料
型號(hào): MK2732-05S
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 85.9 MHz, OTHER CLOCK GENERATOR, PDSO16
封裝: 0.150 INCH, SOIC-16
文件頁(yè)數(shù): 2/4頁(yè)
文件大?。?/td> 41K
代理商: MK2732-05S
MK2732-05
Low Phase Noise VCXO+Multiplier
MDS 2732-05 E
2
Revision 101001
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126(408) 295-9800 tel www.icst.com
Pin Descriptions
Key: I = Input with internal pull-up resistor; TI = tri-level input; O = output; P = power supply connection; VI = analog
voltage input; XI, XO = crystal pins.
Pin Assignment
Number
Name
Type
Description
1
X1
XI
Crystal connection. Connect to a pullable crystal of 10-14.318 MHz.
2, 3
VDD5
P
Core VDD. Connect to +5V.
4
VIN
VI
Voltage Input to VCXO. Zero to 3V signal which controls the frequency of the VCXO.
5, 6, 13
GND
P
Connect to ground.
7
S2
I
Select input #2. Selects outputs per table above. Do not exceed VDDIO.
8
OE
I
Output Enable. Tri-states outputs when low. Do not exceed VDDIO.
9
CLK1
O
Clock Output #1 per table above. Amplitude = VDDIO.
10
S0
TI
Select input #0. Selects outputs per table above. Do not exceed VDDIO.
11
VDDIO
P
Input and output VDD. Connect to +3.3V or +5V. Clock amplitude matches this voltage.
12
CLK2
O
Clock Output #2 per table above. Amplitude = VDDIO.
14
S1
I
Select input #1. Selects outputs per table above. Do not exceed VDDIO.
15
NC
-
Nothing is connected internally to this pin.
16
X2
XO
Crystal connection. Connect to a pullable crystal of 10-14.318 MHz.
External Components
The MK2732-05 requires a minimum number of external components for proper operation. Decoupling capacitors of
0.1F should be connected between VDD5 and GND on pins 3 and 5, and VDDIO and GND on pins 11 and 13, as
close to the MK2732-05 as possible. A series termination resistor of 33
may be used for each clock output. The
input crystal must be connected as close to the chip as possible. The input crystal should be a fundamental mode,
parallel resonant, pullable, AT cut. A crystal with 14 pF load capacitance is recommended. Consult ICS/MicroClock for
recommended suppliers. IMPORTANT - consult the application note MAN05 for layout guidelines.
16
15
14
13
16 pin narrow (150 mil) SOIC
16 pin (173 mil) TSSOP
12
11
10
9
1
2
3
4
5
6
7
8
VDD5
GND
X2
X1
VIN
OE
GND
S2
GND
CLK2
S0
CLK1
VDDIO
NC
S1
VDD5
S2
S1
S0
CLK1
CLK2
0
REF/4
REF/2
0
M
OFF
x0.666
0
1
OFF
x2.6666
0
1
0
OFF
x4
0
1
M
OFF
x1.5
0
1
OFF
x1.3333
1
0
Test
1
0
M
OFF
x4
1
0
1
OFF
x2
1
0
OFF
x3
1
M
OFF
x5
1
OFF
x6
0=connect directly to GND, 1=connect
directly to VDDIO, OFF=output stopped
low.
Clock Select Table
相關(guān)PDF資料
PDF描述
MK2732-05STR 85.9 MHz, OTHER CLOCK GENERATOR, PDSO16
MK2732-06GTR 54 MHz, VIDEO CLOCK GENERATOR, PDSO16
MK2743SLF 66 MHz, VIDEO CLOCK GENERATOR, PDSO16
MK2743S 66 MHz, VIDEO CLOCK GENERATOR, PDSO16
MK2743STRLF 66 MHz, VIDEO CLOCK GENERATOR, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MK2732-05STR 制造商:ICS 制造商全稱:ICS 功能描述:Low Phase Noise VCXO+Multiplier
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MK2732-06GITR 功能描述:IC VCXO/MULTIPLIER 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時(shí)鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)