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參數(shù)資料
| 型號： | MK2049-11SITRLF |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 56 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MK2049-11SITRLF |
Communications Clock PLL
MDS 2049-11 C
3
Revision 021402
Integrated Circuit Systems, Inc. q 525 Race Street San Jose, CA 95126 q tel (408) 295-9800 q
www.icst.com
MK2049-11
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
NC
-
No internal connection, may be tied high or low, or left floating.
2
X2
-
Crystal Output. Connect this pin to the external reference crystal.
3
X1
-
Crystal Input. Connect this pin to the external reference crystal.
4
VDD
Power
Power Supply. Connect to +5V.
5
VDD
Power
Power Supply. Connect to +5V.
6
VDD
Power
Power Supply. Connect to +5V.
7
GND
Power
Ground.
8
CLK2
Output
Clock output, frequency determined by status of FS3:1 per table on
page 2.
9
CLK1
Output
Clock output, frequency determined by status of FS3:1 per table on
page 2.
10
8k
Output
8.000kHz Clock Output, applicable modes only, refer to table on page 2.
11
FS2
Input
Frequency selection input. Determines output clock frequencies per
table on page 2. Internal pull-up, will assume logic high when
unconnected.
12
FS3
Input
Frequency selection input. Determines output clock frequencies per
table on page 2. Internal pull-up, will assume logic high when
unconnected.
13
ICLK
Input
Input Clock Connection.
14
GND
Power
Ground.
15
VDD
Power
Power Supply. Connect to +5V.
16
CAP1
-
Loop Filter Connection. Refer to Block Diagram on page 1.
17
GND
Power
Ground.
18
CAP2
-
Loop Filter Connection. Refer to Block Diagram on page 1.
19
FS1
Input
Frequency selection input. Determines output clock frequencies per
table on page 2. Internal pull-up, will assume logic high when
unconnected.
20
NC
-
No internal connection, may be tied high or low, or left floating.
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PDF描述 |
|---|---|
| MK2049-11SITRLF | 56 MHz, OTHER CLOCK GENERATOR, PDSO20 |
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| MK2069-01GILFTR | 160 MHz, OTHER CLOCK GENERATOR, PDSO56 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MK2049-34 | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-34A | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 Volt Communications Clock VCXO PLL |
| MK2049-34SAI | 功能描述:IC VCXO PLL CLK SYNTH 20-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| MK2049-34SAILF | 功能描述:時鐘合成器/抖動清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2049-34SAILFTR | 功能描述:時鐘合成器/抖動清除器 3.3 VOLT COMMUNICA. CLOCK VCXO PLL RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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