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參數(shù)資料
| 型號(hào)： | MJE16106 |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 功率晶體管 |
| 英文描述： | POWER TRANSISTORS 8 AMPERES 400 VOLTS 100 AND 125 WATTS |
| 中文描述： | 8 A, 400 V, NPN, Si, POWER TRANSISTOR, TO-220AB |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 380K |
| 代理商： | MJE16106 |
6
Motorola Bipolar Power Transistor Device Data
DYNAMIC SATURATION VOLTAGE
For bipolar power transistors low DC saturation voltages
are achieved by conductivity modulating the collector region.
Since conductivity modulation takes a finite amount of time,
DC saturation voltages are not achieved instantly at turn–on.
In bridge circuits, two transistor forward converters, and two
transistor flyback converters dynamic saturation characteris-
tics are responsible for the bulk of dynamic losses. The
MJE16106 has been designed specifically to minimize these
losses. Performance is roughly four times better than the
original version of MJ16006.
From a measurement point of view, dynamic saturation
voltage is defined as collector–emitter voltage at a specific
point in time after IB1 has been applied, where t = 0 is the
90% point on the IB1 rise time waveform. This definition is il-
lustrated in Figure 11. Performance data was taken in the cir-
cuit that is shown in Figure 13. The 24 volt rail allows a
Tektronix 2445 or equivalent scope to operate at 1 volt per
division without input amplifier saturation.
Dynamic saturation performance is illustrated in Figure 12.
The MJE16106 reaches DC saturation levels in approxi-
mately 2
μ
s, provided that sufficient base drive is provided.
The dependence of dynamic saturation voltage upon base
drive suggests a spike of IB1 at turn–on to minimize dynamic
saturation losses, and also avoid overdrive at turn–off. How-
ever, in order to simulate worst case conditions the guaran-
teed dynamic saturation limits in this data sheet are specified
with a constant level of IB1.
GUARANTEED SAFE OPERATING AREA INFORMATION
+ 24
1 k
1 k
10 k
0.1
μ
F
0.01
μ
F
100 pF
U1
MC1455
(OSCILLATOR)
1N5314
Q1
1N4111
MJ11012
100
μ
F
100
1 W
2.4
20 W
0.01
μ
F
Q4
IRFD9120
Q5
MTM8P08
2.4 mH
1N5831
10
μ
F
IC
IB
VCE
MUR405
MUR405
47
1 W
500
Q2
Q3
IRFD113
0.01
μ
F
0.01
μ
F
IRFD9123
1N914
10 k
1.8 k
Q6
MTP25N06
4
8
7
6
2
1 5
3
4
8
2
3
7
6
1
5
Figure 13. Dynamic Saturation Test Circuit
T.U.T.
U2
MC1455
(25
μ
s)
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 15. Maximum Rated Reverse Bias
Safe Operating Area
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 14. Maximum Rated Forward Bias
Safe Operating Area
20
18
16
14
10
8
6
0
2
4
100
200
300
500
0
400
20
7
10
7
5
1
0.02
100
WIRE BOND LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
LIMIT
20
30
I
0.1
0.07
10
200
650
3
2
0.3
0.2
50
0.05
0.03
dc
TC = 25
°
C
1.0 ms
100 ns
10
μ
s
REGION II — EXPANDED
FBSOA USING MUR870
ULTRAFAST RECTIFIER
(SEE FIGURE 16)
I
0.7
0.5
300
70
500
MJE16106
II
12
600
700 800 900
1K
IC/IB1 = 5
TJ
≤
100
°
C
VBE(off) = 1 to 5 V
VBE(off) = 0 V
Figure 16. Switching Safe Operating Area
+15
150
100
μ
F
MTP8P10
MPF930
MPF930
MUR105
MJE210
150
500
μ
F
VOff
50
+10
MTP12N10
RB1
RB2
1
μ
F
1.0
μ
F
100
MTP8P10
MUR105
MUR170
T.U.T.
MUR870
VCE (650 V MAX)
10
μ
F
10 mH
Note: Test Circuit for Ultra–fast FBSOA
Note:
RB2 = 0 and VOff = –5 Volts
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