- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359154 > MCM63R836 (飛思卡爾半導(dǎo)體(中國(guó))有限公司) MCM63R836 PDF資料下載
參數(shù)資料
| 型號(hào)： | MCM63R836 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | MCM63R836 |
| 中文描述： | MCM63R836 |
| 文件頁(yè)數(shù)： | 8/21頁(yè) |
| 文件大?。?/td> | 363K |
| 代理商： | MCM63R836 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)
MCM63R836
MCM63R918
8
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(2.375 V
≤
VDD
≤
3.6 V, 0
°
C
≤
TA
≤
70
°
C, Unless Otherwise Noted)
Input Pulse Levels
Input Rise/Fall Time
Input Timing Measurement Reference Level
Output Timing Reference Level
0.25 to 1.25 V
1 V/ns (20% to 80%)
. . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
0.75 V
0.75 V
. . . . . . . . . . . . . . . . . . . . . . . . .
Clock Input Timing Reference Level
ZQ for 50
Impedance
R
θ
JA Device
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential Cross–Point
. . . . . .
250
22 C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READ/WRITE CYCLE TIMING
(See Note 1)
63R836–3.0
63R918–3.0
63R836–3.3
63R918–3.3
63R836–3.7
63R918–3.7
63R836–4.0
63R918–4.0
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Cycle Time
tKHKH
tKHKL
tKLKH
tKHQX1
tKHQV
tKHQX
tKHQZ
tZZE
tZZR
tAVKH
tDVKH
tSVKH
tWVKH
tKHAX
tKHDX
tKHSX
tKHWX
3
—
3.3
—
3.7
—
4
—
ns
Clock High Pulse Width
1.2
—
1.2
—
1.5
—
1.5
—
ns
Clock Low Pulse Width
1.2
—
1.2
—
1.5
—
1.5
—
ns
Clock High to Output Low–Z
0.5
—
0.5
—
0.5
—
0.5
—
ns
1, 2
Clock High to Output Valid
—
1.5
—
1.65
—
1.85
—
2
ns
Clock High to Output Hold
0.5
—
0.5
—
0.5
—
0.5
—
ns
1
Clock High to Output High–Z
—
1.5
—
1.6
—
1.7
—
2
ns
1, 3
ZZ High to Sleep Mode
3
—
3.3
—
3.7
—
4
—
ns
ZZ Low to Recovery
—
10
—
10
—
10
—
10
ns
Setup Times:
Address
Data In
Chip Select
Write Enable
0.5
—
0.5
—
0.5
—
0.5
—
ns
Hold Times:
Address
Data In
Chip Select
Write Enable
0.5
—
0.5
—
0.5
—
0.5
—
ns
NOTES:
1. This parameter is sampled and not 100% tested.
2. Measured at
±
200 mV from steady state.
3. Measured at
±
200 mV from steady state. See Test Load Figure 1b.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCN51-30S3-PFA | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| MCN51-30S3-DS | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| MCR100-3 | SCR |
| MCR100-8 | Silicon Controlled Rectifiers(Reverse Blocking Triode Thyristors) |
| MCR100-6 | Silicon Controlled Rectifiers(Reverse Blocking Triode Thyristors) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM63R836A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8M Late Write HSTL |
| MCM63R836FC3.0 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCM63R836 |
| MCM63R836FC3.0R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCM63R836 |
| MCM63R836FC3.3 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCM63R836 |
| MCM63R836FC3.3R | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCM63R836 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。