參數(shù)資料
型號: MC74HCT245
廠商: ON SEMICONDUCTOR
英文描述: Octal 3-State Noninverting Bus Transceiver with LSTTL Compatible Inputs
中文描述: 八路三態(tài)總線收發(fā)器的同相輸入通道兼容輸入
文件頁數(shù): 2/8頁
文件大?。?/td> 271K
代理商: MC74HCT245
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
3–2
450
Tstg
TL
SSOP or TSSOP Package
Storage Temperature
– 65 to + 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
SSOP or TSSOP Package: – 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Symbol
Parameter
Test Conditions
V
VCC
25 C
125 C
VIH
Minimum High–Level Input
Vout = 0.1 V or VCC – 0.1 V
4.5
2.0
85 C
2.0
2.0
Unit
V
Voltage
|Iout|
20
μ
A
5.5
5.4
5.4
5.4
Vin = VIH or VIL
|Iout|
6.0 mA
4.5
0.26
0.33
0.4
Iin
Maximum Input Leakage Current
Vin = VCC or GND, Pins 1 or 19
5.5
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
相關PDF資料
PDF描述
MC74HCT245ADW Octal 3-State Noninverting Bus Transceiver with LSTTL Compatible Inputs
MC74HCT245AN Octal 3-State Noninverting Bus Transceiver with LSTTL Compatible Inputs
MC74HCT245ASD Octal 3-State Noninverting Bus Transceiver with LSTTL Compatible Inputs
MC74HCT32AD Octal 2-Input OR Gate with LSTTL Compatible Inputs
MC74HCT32AN Octal 2-Input OR Gate with LSTTL Compatible Inputs
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