4-230
FAST AND LS TTL DATA
MC74F579
FUNCTION TABLE
MR
SR
CS
PE
CEP
CET
U/D
OE
CP
Function
X
X
H
X
X
X
X
X
X
I/O0 to I/O7 in Hi-Z (PE disabled)
I/O0 to I/O7 in Hi-Z
Flip-Flop outputs appear on I/O lines
X
X
L
H
X
X
X
H
X
X
X
L
H
X
X
X
L
X
L
X
X
X
X
X
X
X
X
Asynchronous reset for all flip-flops
H
L
X
X
X
X
X
X
↑
Synchronous reset for all flip-flops
H
H
L
L
X
X
X
X
↑
Parallel load all flip-flops
H
H
(not LL)
H
X
X
X
↑
Hold
H
H
(not LL)
X
H
X
X
↑
Hold (TC held high)
H
H
(not LL)
L
L
H
X
↑
Count up
H
H
(not LL)
L
L
L
X
↑
Count down
H = High voltage level
X = Don’t care
(not LL) = CS and PE should never both be low voltage at the same time
L = Low voltage level
↑
= Low-to-High clock transition
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
74F
Unit
(Note 1)
Min
Typ (2)
Max
Test Conditions
VOH
Output HIGH Voltage
TC
2.5
V
IOH = –1.0 mA
VIH = MIN
VCC = 4.5 V
2.7
3.4
VIL = MAX
VCC = 4.75 V
I/On
2.4
3.3
V
IOH = –3.0 mA
VIH = MIN
VCC = 4.5 V
2.7
3.3
VIL = MAX
VCC = 4.75 V
VOL
Output LOW Voltage
TC
0.35
0.5
V
IOL = 20 mA
VCC = 4.5 V
VIH = MIN
I/On
IOL = 24 mA
VIL = MAX
VIK
Input Clamp Diode Voltage
–0.73
–1.2
V
VCC = 4.5 V, IIN = –18 mA
IIH
Input HIGH Current
I/On
others
1.0
mA
VCC = 5.5 V
VIN = 5.5 V
VIN = 7.0 V
100
μ
A
I/On
others
70
μ
A
VCC = 5.5 V, VIN = 2.7 V
20
IIL
Input LOW Current
Except
I/On
–0.6
mA
VCC = 5.5 V, VIN = 0.5 V
IOZH
OFF-State Current
High-Level Voltage Applied
I/On
70
μ
A
VCC = 5.5 V
VOUT = 2.7 V
IOZL
OFF-State Current
Low-Level Voltage Applied
–600
VOUT = 0.5 V
IOS
Output Short Circuit Current (Note 3)
–60
–80
–150
mA
VCC = MAX, VOUT = 0 V
ICC
Total Supply Current (total)
ICCH
ICCL
ICCZ
95
135
mA
VCC = MAX
105
145
105
150
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating conditions for the applicable device type.
2. All typical values are at VCC = 5.0 V, TA = 25
°
C.
3. Not more than one output should be shorted at a time. For IOS testing, the use of high-speed test apparatus and/or sample-and-hold techniques are prefer-
able in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a HIGH output may raise the chip
temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be per-
formed last.