參數資料
型號: MC68RHC908JK1
廠商: Motorola, Inc.
英文描述: MC68HC908JK1
中文描述: MC68HC908JK1
文件頁數: 75/83頁
文件大?。?/td> 1923K
代理商: MC68RHC908JK1
System Integration Module (SIM)
SIM Bus Clock Control and Generation
MC68H(R)C908JL3
Rev. 1.0
Technical Data
MOTOROLA
System Integration Module (SIM)
75
7.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, OSCOUT, as shown in
Figure 7-3
.
Figure 7-3. SIM Clock Signals
7.3.1 Bus Timing
In user mode
,
the internal bus frequency is the oscillator frequency
(2OSCOUT) divided by four.
7.3.2 Clock Start-Up from POR
When the power-on reset module generates a reset, the clocks to the
CPU and peripherals are inactive and held in an inactive phase until after
the 4096 2OSCOUT cycle POR time-out has completed. The RST pin is
driven low by the SIM during this entire period. The IBUS clocks start
upon completion of the time-out.
7.3.3 Clocks in Stop Mode and Wait Mode
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows
2OSCOUT to clock the SIM counter. The CPU and peripheral clocks do
not become active until after the stop delay time-out. This time-out is
selectable as 4096 or 32 2OSCOUT cycles. (See
7.7.2 Stop Mode
.)
÷
2
BUS CLOCK
GENERATORS
SIM
SIM COUNTER
From
OSCILLATOR
From
OSCILLATOR
OSCOUT
2OSCOUT
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MC68HRC908JL3MP CA-BAYONET
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