參數(shù)資料
型號(hào)： MC68HRC908JL3MP
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： CA-BAYONET
中文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 73/83頁
文件大小： 1923K
代理商： MC68HRC908JL3MP
System Integration Module (SIM)
Introduction
MC68H(R)C908JL3
—
Rev. 1.0
Technical Data
MOTOROLA
System Integration Module (SIM)
73
Figure 7-1. SIM Block Diagram
Table 7-1. Signal Name Conventions
Signal Name
Description
2OSCOUT
Buffered clock from the X-tal oscillator circuit or the RC oscillator circuit.
OSCOUT
The 2OSCOUT frequency divided by two. This signal is again divided by two in the
SIM to generate the internal bus clocks. (Bus clock = 2OSCOUT ÷ 4)
IAB
Internal address bus
IDB
Internal data bus
PORRST
Signal from the power-on reset module to the SIM
IRST
Internal reset signal
R/W
Read/write signal
STOP/WAIT
CONTROL
CLOCK
CONTROL
CLOCK GENERATORS
POR CONTROL
RESET PIN CONTROL
SIM RESET STATUS REGISTER
INTERRUPT CONTROL
AND PRIORITY DECODE
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
OSCOUT (FROM OSCILLATOR)
INTERNAL CLOCKS
MASTER
RESET
CONTROL
RESET
PIN LOGIC
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
USB RESET (FROM USB MODULE)
INTERRUPT SOURCES
CPU INTERFACE
RESET
SIM
COUNTER
COP CLOCK
2OSCOUT (FROM OSCILLATOR)
÷
2
VDD
INTERNAL
PULL-UP
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