參數(shù)資料
型號(hào): MC68HRC908JL3MP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: CA-BAYONET
中文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁(yè)數(shù): 29/83頁(yè)
文件大?。?/td> 1923K
代理商: MC68HRC908JL3MP
Memory
I/O Section
MC68H(R)C908JL3
Rev. 1.0
Technical Data
MOTOROLA
Memory
29
2.3 I/O Section
Addresses $0000–$003F, shown in
Figure 2-2
, contain most of the
control, status, and data registers. Additional I/O registers have the
following addresses:
$FE00 (Break Status Register, BSR)
$FE01 (Reset Status Register, RSR)
$FE02 (Reserved, SUBAR)
$FE03 (Break Flag Control Register, BFCR)
$FE04 (Interrupt Status Register 1, INT1)
$FE05 (Interrupt Status Register 2, INT2)
$FE06 (Interrupt Status Register 3, INT3)
$FE07 (Reserved)
$FE08 (FLASH Control Register, FLCR)
$FE09 (FLASH Block Protect Register, FLBPR)
$FE0A (Reserved)
$FE0B (Reserved)
$FE0C (Break Address Register High, BRKH)
$FE0D (Break Address Register Low, BRKL)
$FE0E (Break Status and Control Register, BRKSCR)
$FE0F (Reserved)
$FFFF (COP Control Register, COPCTL)
2.4 Monitor ROM
The 960 bytes at addresses $FC00–$FDFF and $FE10–$FFCF are
reserved ROM addresses that contain the instructions for the monitor
functions.
(See
Section 9. Monitor ROM (MON)
.)
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