參數(shù)資料
型號: MC68HRC908JL3
廠商: Motorola, Inc.
英文描述: MC68HC908JK1
中文描述: MC68HC908JK1
文件頁數(shù): 81/83頁
文件大?。?/td> 1923K
代理商: MC68HRC908JL3
System Integration Module (SIM)
Exception Control
MC68H(R)C908JL3
Rev. 1.0
Technical Data
MOTOROLA
System Integration Module (SIM)
81
7.5.3 SIM Counter and Reset States
External reset has no effect on the SIM counter. (See
7.7.2 Stop Mode
for details.) The SIM counter is free-running after all reset states. (See
7.4.2 Active Resets from Internal Sources
for counter control and
internal reset recovery sequences.)
7.6 Exception Control
Normal, sequential program execution can be changed in three different
ways:
Interrupts
Maskable hardware CPU interrupts
Non-maskable software interrupt instruction (SWI)
Reset
Break interrupts
7.6.1 Interrupts
An interrupt temporarily changes the sequence of program execution to
respond to a particular event.
Figure 7-8
flow charts the handling of
system interrupts.
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared).
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