參數(shù)資料
型號: MC68HRC908JL3
廠商: Motorola, Inc.
英文描述: MC68HC908JK1
中文描述: MC68HC908JK1
文件頁數(shù): 56/83頁
文件大?。?/td> 1923K
代理商: MC68HRC908JL3
Central Processor Unit (CPU)
Technical Data
MC68H(R)C908JL3
Rev. 1.0
56
Central Processor Unit (CPU)
MOTOROLA
5 are set permanently to logic 1. The following paragraphs describe the
functions of the condition code register.
V — Overflow Flag
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
1 = Overflow
0 = No overflow
H — Half-Carry Flag
The CPU sets the half-carry flag when a carry occurs between
accumulator bits 3 and 4 during an add-without-carry (ADD) or add-
with-carry (ADC) operation. The half-carry flag is required for binary-
coded decimal (BCD) arithmetic operations. The DAA instruction uses
the states of the H and C flags to determine the appropriate correction
factor.
1 = Carry between bits 3 and 4
0 = No carry between bits 3 and 4
Bit 7
6
5
4
3
2
1
Bit 0
Read:
V
1
1
H
I
N
Z
C
Write:
Reset:
X
1
1
X
1
X
X
X
X = Indeterminate
Figure 6-6. Condition Code Register (CCR)
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