參數(shù)資料
型號(hào): MC68HRC908JK1CDW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: MC68HC908JK1
中文描述: 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 46/83頁
文件大?。?/td> 1923K
代理商: MC68HRC908JK1CDW
FLASH Memory (FLASH)
Technical Data
MC68H(R)C908JL3
Rev. 1.0
46
FLASH Memory (FLASH)
MOTOROLA
4.9 FLASH Block Protect Register
The FLASH Block Protect Register is implemented as an 8-bit I/O
register. The value in this register determines the starting address of the
protected range within the FLASH memory.
BPR[7:1], bit-0 — FLASH Protection Register Bits [7:1]
These eight bits in FLBPR (bit-0 is always 0) represent bits [12:5] of
a 16-bit memory address. Bits [15:13] are logic 1s and bits [4:0] are
logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF. With
this mechanism, the protect start address can be XX00, XX40, XX80,
or XXC0 within the FLASH memory.
Examples of protect start address:
Address:
$FE09
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
0
Write:
Reset:
0
0
0
0
0
0
0
0
Figure 4-3. FLASH Block Protect Register (FLBPR)
BPR[7:0]
Start of Address of Protect Range
$00–$60
The entire FLASH memory is protected.
$62 (
0110 0010
)
$EC40 (111
0 1100 010
0 0000)
$64 (
0110 0100
)
$EC80 (111
0 1100 100
0 0000)
$68 (
0110 1000
)
$ED00 (111
0 1101 000
0 0000)
and so on...
$DE (
1101 1110
)
$FBC0 (111
1 1011 11
00 0000)
$FE (
1111 1110
)
$FFC0 (111
1 1111 110
0 0000)
$FF
The entire FLASH memory is not protected.
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