參數(shù)資料
型號： MC68HRC908JK1
廠商： Motorola, Inc.
英文描述： MC68HC908JK1
中文描述： MC68HC908JK1
文件頁數(shù)： 57/83頁
文件大?。?/td> 1923K
代理商： MC68HRC908JK1
Central Processor Unit (CPU)
CPU Registers
MC68H(R)C908JL3
—
Rev. 1.0
Technical Data
MOTOROLA
Central Processor Unit (CPU)
57
I — Interrupt Mask
When the interrupt mask is set, all maskable CPU interrupts are
disabled. CPU interrupts are enabled when the interrupt mask is
cleared. When a CPU interrupt occurs, the interrupt mask is set
automatically after the CPU registers are saved on the stack, but
before the interrupt vector is fetched.
1 = Interrupts disabled
0 = Interrupts enabled
NOTE:
To maintain M6805 Family compatibility, the upper byte of the index
register (H) is not stacked automatically. If the interrupt service routine
modifies H, then the user must stack and unstack H using the PSHH and
PULH instructions.
After the I bit is cleared, the highest-priority interrupt request is
serviced first.
A return-from-interrupt (RTI) instruction pulls the CPU registers from
the stack and restores the interrupt mask from the stack. After any
reset, the interrupt mask is set and can be cleared only by the clear
interrupt mask software instruction (CLI).
N — Negative flag
The CPU sets the negative flag when an arithmetic operation, logic
operation, or data manipulation produces a negative result, setting bit
7 of the result.
1 = Negative result
0 = Non-negative result
Z — Zero flag
The CPU sets the zero flag when an arithmetic operation, logic
operation, or data manipulation produces a result of $00.
1 = Zero result
0 = Non-zero result
相關(guān)PDF資料
PDF描述
MC68HRC908JK1CDW MC68HC908JK1
MC68HRC908JK1CP MC68HC908JK1
MC68HRC908JK3 MC68HC908JK1
MC68HRC908JK3CDW MC68HC908JK1
MC68HRC908JK3CP MC68HC908JK1
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MC68HRC908JK1MDW 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
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