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Electrical Specifications
5V Control Timing
MC68H(R)C908JL3E/JK3E/JK1E
—
Rev. 2.0
Technical Data
MOTOROLA
Electrical Specifications
201
18.7 5V Control Timing
Pullup resistors
(8)
PTD6, PTD7
RST, IRQ1, PTA0–PTA6
R
PU1
R
PU2
1.8
16
3.3
26
4.8
36
k
k
LVI reset voltage
V
LVR5
3.6
4.0
4.4
V
NOTES:
1. V
DD
= 4.5 to 5.5 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25
°
C only.
3. Run (operating) I
DD
measured using external square wave clock source (f
OP
= 4MHz). All inputs 0.2V from rail. No dc
loads. Less than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run I
DD
. Measured with all modules enabled.
4. Wait I
DD
measured using external square wave clock source (f
OP
= 4MHz). All inputs 0.2V from rail. No dc loads. Less
than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects
wait I
DD
.
5. Stop I
DD
measured with OSC1 grounded; no port pins sourcing current. LVI is disabled.
6. Maximum is highest voltage that POR is guaranteed.
7. If minimum V
DD
is not reached before the internal POR reset is released, RST must be driven low externally until
minimum V
DD
is reached.
8. R
PU1
and
R
PU2
are measured at
V
DD
= 5.0V.
Table 18-5. Control Timing (5V)
Characteristic
(1)
NOTES:
1. V
DD
= 4.5 to 5.5 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
; timing shown with respect to 20% V
DD
and 70% V
SS
, unless otherwise
noted.
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
information.
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
Symbol
Min
Max
Unit
Internal operating frequency
(2)
f
OP
—
8
MHz
RST input pulse width low
(3)
t
IRL
750
—
ns
Table 18-4. DC Electrical Characteristics (5V)
Characteristic
(1)
Symbol
Min
Typ
(2)
Max
Unit