參數(shù)資料
型號: MC68HC705SP7CP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 81/164頁
文件大?。?/td> 1165K
代理商: MC68HC705SP7CP
Input/Output Registers
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
23
Addr.
Register
Bit 7
6
5
4321
Bit 0
$0000
Port A Data Register
(PORTA)
Read:
0
PA5
PA4
PA3
PA2
PA1
PA0
Write:
Reset:
Unaffected by reset
$0001
Port B Data Register
(PORTB)
Read:
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
Write:
Reset:
Unaffected by reset
$0002
Port C(1) Data Register
(PORTC)
Read:
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
Write:
Reset:
Unaffected by reset
$0003
Analog Multiplex Register
(AMUX)
Read:
HOLD
DHOLD
INV
VREF
MUX4
MUX3
MUX2
MUX1
Write:
Reset:
1
0000000
$0004
Data Direction Register A
(DDRA)
Read:
0
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
0
0000000
$0005
Data Direction Register B
(DDRB)
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
0
0000000
$0006
Data Direction Register C
(DDRC)
Read:
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
0
0000000
$0007
Unimplemented
$0008
Core Timer Status and Control
Register (CTSCR)
Read:
CTOF
RTIF
CTOFE
RTIE
00
RT1
RT0
Write:
CTOFR
RTIFR
Reset:
0
0000011
$0009
Core Timer Counter Register
(CTCR)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
0
0000000
$000A
SIOP Control Register
(SCR)
Read:
SPIE
SPE
LSBF
MSTR
0
CPHA
SPR1
SPR0
Write:
SPIR
Reset:
0
0000000
$000B
SIOP Status Register
(SSR)
Read:
SPIF
DCOL
000000
Write:
Reset:
0
0000000
= Unimplemented
R
= Reserved
U = Unaffected
1. Features related to port C are only available on the 28-pin MC68HC705JP7 devices.
Figure 2-3. Register Summary (Sheet 1 of 3)
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