參數(shù)資料
型號： MC14568BD
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Phase Comparator and Programmable Counters
中文描述： 4000/14000/40000 SERIES, ASYN POSITIVE EDGE TRIGGERED UP DIVIDE BY N COUNTER, PDSO16
封裝： PLASTIC, SOIC-16
文件頁數(shù)： 2/12頁
文件大?。?/td> 323K
代理商： MC14568BD
MOTOROLA CMOS LOGIC DATA
MC14568B
2
Min
VDD
Vdc
Characteristic
Symbol
Unit
Max
Min
Typ #
Max
Min
Max
Output Voltage
Vin = VDD or 0
“0” Level
VOL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
“1” Level
Vin = 0 or VDD
VOH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Input Voltage#
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
“0” Level
VIL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
Vdc
“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
Output Drive Current
(VOH = 2.5 Vdc)
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
Input Current
VIH
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
Vdc
Source
IOH
5.0
5.0
10
15
– 1.2
– 0.25
– 0.62
– 1.8
—
—
—
—
– 1.0
– 0.2
– 0.5
– 1.5
– 1.7
– 0.36
– 0.9
– 3.5
—
—
—
—
– 0.7
– 0.14
– 0.35
– 1.1
—
—
—
—
mAdc
Sink
IOL
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
Iin
Cin
IDD
15
—
±
0.1
—
±
0.00001
±
0.1
—
±
1.0
μ
Adc
Input Capacitance
—
—
—
—
5.0
7.5
—
—
pF
Quiescent Current
(Per Package) Vin = 0 or VDD,
Iout = 0
μ
A
Total Supply Current**
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
μ
Adc
IT
5.0
10
15
IT = (0.2
μ
A/kHz) f + IDD
IT = (0.4
μ
A/kHz) f + IDD
IT = (0.9
μ
A/kHz) f + IDD
μ
Adc
Three–State Leakage Current
Pins 1, 13
ITL
15
—
±
0.1
—
±
0.0001
±
0.1
—
±
3.0
μ
Adc
#Noise immunity for worst input combination.
Noise Margin for both “1” and “0” level = 1.0 V min @ VDD = 5.0 V
=
2.0 V min @ VDD = 10 V
=
2.5 V min @ VDD = 15 V
To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + 1 x 10–3 (CL – 50) VDDf
where: IT is in
μ
A (per package), CL in pF, VDD in V, and f in kHz is input frequency.
**The formulas given are for the typical characteristics only at 25 C.
Pin 15 is connected to VSS or VDD for input voltage test.
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
LD
PCout
PCin
CTL
VDD
C1
F
G
DP3
DP2
“0”
PE
Q1/C2
VSS
DP0
DP1
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