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| 型號： | MC145173 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter |
| 中文描述： | 雙頻鎖相環(huán)頻率合成器ADC和頻率計數(shù)器 |
| 文件頁數(shù)： | 30/33頁 |
| 文件大?。?/td> | 277K |
| 代理商： | MC145173 |
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MC145173
30
MOTOROLA
PHASE–LOCKED LOOP — LOW PASS FILTER DESIGN
DEFINITIONS:
N = Total Division Ratio in Feedback Loop
K
φ
(Phase Detector Gain) = VDD/ 4
π
volts per radian for HF PDout
K
φ
(Phase Detector Gain) = IPDout/2
π
amps per radian for VHF PDout
KVCO (VCO Gain) =
2
π
fVCO
VVCO
For a nominal design starting point, the user might consider a damping factor
ζ
≈
0.7 and a natural loop frequency
ω
n
≈
(2
π
fR/50) where fR is the
frequency at the phase detector input. Larger
ω
n values result in faster loop lock times and, for similar sideband filtering, higher fR–related
VCO sidebands.
The filters shown above are frequently followed by additional sideband filtering to further attenuate fR–related VCO sidebands. This addition-
al filtering may be active or passive.
RECOMMENDED READING:
Gardner, Floyd M., Phaselock Techniques (second edition).New York, Wiley–Interscience, 1979.
Manassewitsch, Vadim, Frequency Synthesizers: Theory and Design (second edition). New York, Wiley–Interscience, 1980.
Blanchard, Alain, Phase–Locked Loops: Application to Coherent Receiver Design.New York, Wiley–Interscience, 1976.
Egan, William F., Frequency Synthesis by Phase Lock. New York, Wiley–Interscience, 1981.
Rohde, Ulrich L., Digital PLL Frequency Synthesizers Theory and Design. Englewood Cliffs, NJ, Prentice–Hall, 1983.
Berlin, Howard M., Design of Phase–Locked Loop Circuits, with Experiments.Indianapolis, Howard W. Sams and Co., 1978.
Kinley, Harold, The PLL Synthesizer Cookbook.Blue Ridge Summit, PA, Tab Books, 1980.
Seidman, Arthur H., Integrated Circuits Applications Handbook Chapter 17, pp. 538–586. New York, John Wiley & Sons.
Fadrhons, Jan, “Design and Analyze PLLs on a Programmable Calculator,” EDN March 5, 1980.
AN535, Phase–Locked Loop Design Fundamentals, Motorola Semiconductor Products, Inc., 1970.
AR254, Phase–Locked Loop Design Articles, Motorola Semiconductor Products, Inc., Reprinted with permission from Electronic Design
1987.
F(s) =
ζ
=
ω
n =
(R1+ R2)sC + 1
R2sC + 1
C
VCO
R2
HF PDout
R1
K
φ
KVCO
NC(R1 + R2)
R2C +
N
K
φ
KVCO
0.5
ω
n
Z(s) =
ζ
=
ω
n =
K
φ
KVCO
NC
R
2
sC
KVCOC
N
K
φ
1 + sRC
NOTE:
For VHF PDout, using K
φ
in amps per radian with the filter’s impedance transfer function, Z(s), maintains units of volts per radian for the
detector/ filter combination. Additional sideband filtering can be accomplished by adding a capacitor C
′
across R. The corner
ω
c = 1/RC
′
should be chosen such that
ω
n is not significantly affected.
C
VCO
R
VHF PDout
=
ω
nRC
2
radians per volt
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