參數(shù)資料
型號: MC145173
廠商: Motorola, Inc.
元件分類: 通用總線功能
英文描述: Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter
中文描述: 雙頻鎖相環(huán)頻率合成器ADC和頻率計(jì)數(shù)器
文件頁數(shù): 28/33頁
文件大?。?/td> 277K
代理商: MC145173
MC145173
28
MOTOROLA
LOW–PASS
FILTER
NOTE
6
+ 5 V
GENERAL-PURPOSE
DIGITAL OUTPUT
OSCin
OSCout
VDD
ENB
INPUT D
HF IFin
VHF IFin
VSS
OUTPUT A
1
2
3
4
5
6
7
8
9
10
23
24
13
14
15
16
17
18
19
20
21
22
11
12
+ 5 V
Din
CLK
INPUT C
INPUT B
INPUT A
Dout
REFout
OUTPUT D
VHF PDout
Rx
HFin
OUTPUT C
OUTPUT B
HF PDout
VHFin
OPTIONAL
GAIN
BLOCK
HF
VCO
OPTIONAL GAIN BLOCK
VHF
VCO
LOW-PASS
FILTER
GENERAL-PURPOSE
DIGITAL INPUT
SPECIAL DIGITAL
INPUT WITH
SWITCHPOINT AT
33% OF VDD
ANALOG INPUTS
(SIGNAL LEVEL, ETC.)
MCU
AM SECOND I.F. (450 kHz)
FM I.F. (10.7 MHz)
10.25 MHz
10.25 MHz
BUFFERED
OUTPUT
(AM SECOND L.O.)
+ 5 V
+ 5 V
0.1
μ
F
15 k
FM L.O.
AM FIRST L.O.
MC145173
GENERAL PURPOSE DIGITAL OUTPUTS
R1
RBIAS
NOTE 3
NOTE 3
NOTE 5
NOTES:
1. The HF PDout and VHF PDout pins require different low-pass filters. See the Phase-Locked Loop – Low-Pass Filter Design page for
more information.
2. For optimum performance, bypass the VDD pin to VSS with a low-inductance capacitor.
3. The gain blocks can be simple one-transistor circuits. See Figures 28 and 29.
4. For the AM band, an R counter divide ratio of 1,025 is used for 10 kHz tuning resolution. The FM band uses an R counter ratio of 205 for
50 kHz tuning resolution.
5. I.F. (intermediate frequency) signals are fed to pins 10 and 11 only if seek or scan feature is included in radio.
6. Diode string is used to limit voltage swing at pin 23; additional or fewer diodes may be used. For full rail-to-rail swing, tie R1 to VSS
(GND) and delete the diodes and the RBIAS resistor.
Caution:
this large signal swing may cause a high level of EMI (electromagnetic
interference).
7. Pull-up voltage must be at the same potential as the VDD pin or less. Pull-up device other than a resistor may be used.
8. A 10.25 MHz crystal facilitates design of the AM upconversion scheme shown. This results in double conversion for the AM receiver. Op-
tionally, single-conversion designs may be used which offer more flexibility on reference crystal values. For example, a 10.0 MHz crystal
could be used which would allow higher-performance 200 kHz tuning resolution for FM.
NOTE 8
NOTE 7
+ 5 V
Figure 26. AM-FM Broadcast Receiver Subsystem — USA
相關(guān)PDF資料
PDF描述
MC145202DT Low-Voltage 2.0 GHz PLL Frequency Synthesizer
MC145202EVK Evaluation Board Manual
MC145202F Low-Voltage 2.0 GHz PLL Frequency Synthesizer
MC14522BCL Non-inverting Fast Synchronous Buck MOSFET Drivers with Enable 14-HTSSOP
MC14522BCP Presettable 4-Bit Down Counters
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC14517BCP 功能描述:計(jì)數(shù)器移位寄存器 3-18V Dual 64-Bit RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
MC14517BCPG 功能描述:計(jì)數(shù)器移位寄存器 3-18V Dual 64-Bit Static Shift RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
MC14517BDW 功能描述:計(jì)數(shù)器移位寄存器 3-18V Dual 64-Bit RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
MC14517BDWG 功能描述:計(jì)數(shù)器移位寄存器 3-18V Dual 64-Bit Static Shift RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel
MC14517BDWR2 功能描述:計(jì)數(shù)器移位寄存器 3-18V Dual 64-Bit RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel