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參數(shù)資料
| 型號： | MC14194BD |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bidirectional Universal Shift Register |
| 中文描述： | 4000/14000/40000 SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 239K |
| 代理商： | MC14194BD |
MOTOROLA CMOS LOGIC DATA
285
MC14194B
VDD
10
—
0.05
—
0
0.05
—
0.05
“1” Level
VOH
5.0
15
4.95
14.95
—
—
4.95
14.95
5.0
15
—
—
4.95
14.95
—
—
Vdc
Input Voltage
(VO = 13.5 or 1.5 Vdc)
“0” Level
15
—
4.0
—
6.75
4.0
—
4.0
Vdc
(VO = 1.5 or 13.5 Vdc)
“1” Level
15
11
—
11
8.25
—
11
—
Vdc
Output Drive Current
(VOH = 9.5 Vdc)
10
– 1.6
—
– 1.3
– 2.25
—
– 0.9
—
mAdc
(VOL = 1.5 Vdc)
15
4.2
—
3.4
8.8
—
2.4
—
Input Current
Iin
Cin
15
—
±
0.1
—
±
0.00001
±
0.1
—
±
1.0
μ
Adc
Input Capacitance
—
—
—
—
5.0
7.5
—
—
pF
15
—
20
—
0.015
20
—
600
Total Supply Current**
(CL = 50 pF on all outputs, all
IT
5.0
IT = (0.95
μ
A/kHz) f + IDD
μ
Adc
**The formulas given are for the typical characteristics only at 25 C.
To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in
μ
A (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS
≤
(Vin or Vout)
≤
VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q3
Q2
Q1
VDD
Q0
S0
S1
C
DP1
DP2
DP0
DSR
R
VSS
DSL
DP3
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