參數(shù)資料
型號: M41ST87WMX6T
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO28
封裝: 0.300 INCH, PLASTIC, SOIC-28
文件頁數(shù): 17/38頁
文件大?。?/td> 552K
代理商: M41ST87WMX6T
M41ST87Y, M41ST87W
24/38
CLOCK OPERATION
The eight byte clock register (see Table 11, page
25) is used to both set the clock and to read the
date and time from the clock, in a binary coded
decimal format. Tenths/Hundredths of Seconds,
Seconds, Minutes, and Hours are contained within
the first four registers.
Note: A WRITE to any clock register will result in
the Tenths/Hundredths of Seconds being reset to
“00,” and Tenths/Hundredths of Seconds cannot
be written to any value other than “00.”
Bits D6 and D7 of Clock Register 03h (Century/
Hours Register) contain the CENTURY Bit 0 (CB0)
and CENTURY Bit 1 (CB1). Bits D0 through D2 of
Register 04h contain the Day (day of week). Reg-
isters 05h, 06h, and 07h contain the Date (day of
month), Month, and Years. The ninth clock register
is the Control Register (this is described in the
Clock Calibration section). Bit D7 of Register 01h
contains the STOP Bit (ST). Setting this bit to a '1'
will cause the oscillator to stop. If the device is ex-
pected to spend a significant amount of time on
the shelf, the oscillator may be stopped to reduce
current drain. When reset to a '0' the oscillator re-
starts within one second (typical).
The eight Clock Registers may be read one byte at
a time, or in a sequential block. The Control Reg-
ister (Address location 08h) may be accessed in-
dependently. Provision has been made to assure
that a clock update does not occur while any of the
eight clock addresses are being read. If a clock ad-
dress is being read, an update of the clock regis-
ters will be halted. This will prevent a transition of
data during the READ.
Power Down Time-Stamp
Upon power-up following a power failure, the Halt
Update Bit (HT) will automatically be set to a '1.'
This will prevent the clock from updating the TIME-
KEEPER registers, and will allow the user to read
the exact time of the power-down event. Resetting
the HT Bit to a '0' will allow the clock to update the
TIMEKEEPER registers with the current time.
Note: If the TEB Bit is set, the Power Down Time-
Stamp will be disabled, and the Tamper Event
Time-Stamp will take precedence (see Tamper
Event Time-Stamp on page 22).
TIMEKEEPER Registers
The M41ST87Y/W offers 22 internal registers
which contain Clock, Control, Alarm, Watchdog,
Flag, Square Wave, and Tamper data. The Clock
registers are memory locations which contain ex-
ternal (user accessible) and internal copies of the
data (usually referred to as BiPORT TIMEKEEP-
ER cells). The external copies are independent of
internal functions except that they are updated pe-
riodically by the simultaneous transfer of the incre-
mented internal copy. The internal divider (or
clock) chain will be reset upon the completion of a
WRITE to any clock address (00h to 07h).
The system-to-user transfer of clock data will be
halted whenever the address being read is a clock
address (00h to 07h). The update will resume ei-
ther due to a Stop Condition or when the pointer
increments to a non-clock or RAM address.
TIMEKEEPER and Alarm Registers store data in
BCD format. Control, Watchdog and Square Wave
Registers store data in Binary Format.
相關PDF資料
PDF描述
M41T00SC64MY6E REAL TIME CLOCK, PDSO18
M41T00SM6F 0 TIMER(S), REAL TIME CLOCK, PDSO8
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M41ST87WSS6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:5.0 V and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
M41ST87WSS6F 功能描述:實時時鐘 128 NVRAM Serial RTC 3.0 to 3.6 Vcc RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
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