參數(shù)資料
型號(hào)： M38869MFA
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 35/110頁(yè)
文件大?。?/td> 1601K
代理商： M38869MFA
35
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
BUS INTERFACE
The 3886 group has a 2-byte bus interface function which is al-
most functionally equal to MELPS8-41 series and the control
signal from the host CPU side can operate it (slave mode).
It is possible to connect the 3886 group with the RD and WR
separated CPU bus directly. Figure 34 shows the block diagram of
the bus interface function.
The data bus buffer function I/O pins (P4
2
, P4
3
, P4
6
, P4
7
, P5
0
–
P5
3
, P8) also function as the normal digital port I/O pins. When bit
0 (data bus buffer enable bit) of the data bus buffer control regis-
ter (address 002A
16
) is “0,” these pins become the normal digital
port I/O pins. When it is “1,” these bits become the data bus buffer
function I/O pins.
The selection of either the single data bus buffer mode, which
uses 1 byte: data bus buffer 0 only, or the double data bus buffer
mode, which uses 2 bytes: data bus buffer 0 and data bus buffer
1, is performed by bit 1 (data bus buffer function selection bit) of
the data bus buffer control register (address 002A
16
). Port P4
7
be-
comes S
1
input in the double data bus buffer mode. When data is
written from the host CPU side, an input buffer full interrupt oc-
curs. When data is read from the host CPU, an output buffer
empty interrupt occurs. This microcomputer shares two input
buffer full interrupt requests and two output buffer empty interrupt
requests as shown in Figure 32, respectively.
Fig. 32 Interrupt request circuit of data bus buffer
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