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參數(shù)資料
| 型號： | M34508G4GP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 75/106頁 |
| 文件大小： | 1059K |
| 代理商： | M34508G4GP |
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Rev.1.03
2009.07.27
page 68 of 140
REJ03B0148-0103
4508 Group
NOTES ON NOISE
Countermeasures against noise are described below.
The following countermeasures are effective against noise in theory,
however, it is necessary not only to take measures as follows but to
evaluate before actual use.
1. Shortest wiring length
(1) Wiring for RESET pin
Make the length of wiring which is connected to the RESET pin as
short as possible. Especially, connect a capacitor across the
RESET pin and the VSS pin with the shortest possible wiring.
<Reason>
In order to reset a microcomputer correctly, 1 machine cycle or more
of the width of a pulse input into the RESET pin is required.
If noise having a shorter pulse width than this is input to the RESET
input pin, the reset is released before the internal state of the micro-
computer is completely initialized.
This may cause a program runaway.
Fig. 64 Wiring for the RESET pin
(2) Wiring for clock input/output pins
Make the length of wiring which is connected to clock I/O pins as
short as possible.
Make the length of wiring across the grounding lead of a capacitor
which is connected to an oscillator and the VSS pin of a microcom-
puter as short as possible.
Separate the VSS pattern only for oscillation from other VSS pat-
terns.
<Reason>
If noise enters clock I/O pins, clock waveforms may be deformed.
This may cause a program failure or program runaway. Also, if a po-
tential difference is caused by the noise between the VSS level of a
microcomputer and the VSS level of an oscillator, the correct clock
will not be input in the microcomputer.
RESET
Reset
circuit
Noise
VSS
Reset
circuit
VSS
RESET
VSS
N.G.
O.K.
Noise
XIN
XOUT
VSS
XIN
XOUT
VSS
N.G.
O.K.
(3) Wiring to CNVSS pin
Connect CNVSS pin to a GND pattern at the shortest distance.
The GND pattern is required to be as close as possible to the GND
supplied to VSS.
In order to improve the noise reduction, to connect a 5 k resistor
serially to the CNVSS pin - GND line may be valid.
As well as the above-mentioned, in this case, connect to a GND pat-
tern at the shortest distance. The GND pattern is required to be as
close as possible to the GND supplied to VSS.
<Reason>
The CNVSS pin of the QzROM is the power source input pin for the
built-in QzROM. When programming in the built-in QzROM, the im-
pedance of the CNVSS pin is low to allow the electric current for
writing flow into the QzROM. Because of this, noise can enter easily.
If noise enters the CNVSS pin, abnormal instruction codes or data
are read from the built-in QzROM, which may cause a program run-
away.
Fig. 66 Wiring for the CNVSS pin of the QzPROM
About 5k
VSS
The shortest
CNVSS
(Note)
Note: This indicates pin.
Fig. 65 Wiring for clock I/O pins
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34508G4GP#U0 | 功能描述:MCU 2/5V 4096 QZROM PB-FREE 20-S RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:720/4500 標(biāo)準(zhǔn)包裝:300 系列:78K0R/Ix3 核心處理器:78K/0R 芯體尺寸:16-位 速度:40MHz 連通性:3 線 SIO，I²C，LIN，UART/USART 外圍設(shè)備:DMA，LVD，POR，PWM，WDT 輸入/輸出數(shù):27 程序存儲器容量:16KB（16K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:38-SSOP 包裝:托盤 |
| M34508G4GP(#UO) | 制造商:Renesas Electronics Corporation 功能描述: |
| M34508G4HFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34508G4HGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34508G4H-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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