參數(shù)資料
型號(hào): M306H3MC-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP116
封裝: 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁數(shù): 52/135頁
文件大?。?/td> 2583K
代理商: M306H3MC-XXXFP
Rev.1.00
2004.03.23
page 23 of 320
M306H3MC-XXXFP/FCFP
2.4 Processor Mode
(1) Types of Processor Mode
Three processor modes are available to choose from: single-chip mode, memory expansion mode, and
microprocessor mode. Table 2.4.1 shows the features of these processor modes.
(2) Setting Processor Modes
Processor mode is set by using the CNVSS pin and the PM01 to PM00 bits in the PM0 register.
Table 2.4.2 shows the processor mode after hardware reset. Table 2.4.3 shows the PM01 to PM00 bit set
values and processor modes.
In the flash memory version, after hardware reset, apply the CNVSS pin and the M1 pin to VCC when use
microprocessor. In the mask ROM version, after hardware reset, apply the CNVSS pin to VCC when use
microprocessor.
Table 2.4.1. Features of Processor Modes
Processor modes
Access space
Pins which are assigned I/O ports
Single-chip mode
SFR, internal RAM, internal ROM
All pins are I/O ports or peripheral
function I/O pins
Memory expansion mode
SFR, internal RAM, internal ROM,
external area (Note)
Some pins serve as bus control pins (Note)
Microprocessor mode
SFR, internal RAM, external area (Note) Some pins serve as bus control pins (Note)
Note : Refer to “Bus”.
CNVSS pin input level
Processor mode
VSS
Single-chip mode
VCC (Note 1, Note 2)
Microprocessor mode
Note 1: If the microcomputer is reset in hardware by applying VCC to the CNVSS pin and the M1 pin in
the flash memory version (by applying VCC to the CNVSS pin in the mask ROM version) the
internal ROM cannot be accessed regardless of PM10 to PM00 bits.
Note 2: The multiplexed bus cannot be assigned to the entire CS space.
PM01 to PM00 bits
Processor modes
Single-chip mode
Memory expansion mode
Must not be set
002
012
102
Microprocessor mode
112
Rewriting the PM01 to PM00 bits places the microcomputer in the corresponding processor mode regard-
less of whether the input level on the CNVSS pin is “H” or “L”. Note, however, that the PM01 to PM00 bits
cannot be rewritten to “012” (memory expansion mode) or “112” (microprocessor mode) at the same time
the PM07 to PM02 bits are rewritten. Note also that these bits cannot be rewritten to enter microprocessor
mode in the internal ROM, nor can they be rewritten to exit microprocessor mode in areas overlapping the
internal ROM.
If the microcomputer is reset in hardware by applying VCC to the CNVSS pin and the M1 pin in the flash
memory version (by applying VCC to the CNVSS pin in the mask ROM version), the internal ROM cannot
be accessed regardless of PM01 to PM00 bits.
Figures 2.4.1 and 2.4.2 show the registers associated with processor modes. Figure 2.4.3 show the
memory map in single chip mode.
Table 2.4.2. Processor Mode After Hardware Reset
Table 2.4.3. PM01 to PM00 Bits Set Values and Processor Modes
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