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14
14-7
High Voltage
V
IN
V
OUT
V
CC
I
AUX
V
AUX
C1
C2
D2
I
IN
LR7
GND
PWM IC
UC3844
LR745
Block Diagram Detailed
Description
The Supertex LR7 is a high voltage switch mode power supply
start-up circuit, which has 3 terminals: V
, GND, and V
. An
input voltage range of 25VDC to 450VDC can be applied directly
at the input V
pin. The output voltage, V
, is monitored by the
2 comparators, comp1 and comp2. An internal reference, V
,
and resistor divider R1, R2, and R3 set the nominal V
OUT
trip
points of 7.0V for comp1 and 13.25V for comp2.
When a voltage is applied on V
, V
will start to ramp up from
0V. When V
is less than 7.0V, the output of comp1 will be at
a logic high state keeping the D flip flop in a reset state. The
output of the D flip flop, Q, will be at logic low keeping transistor
M2 off. The data input for the D flip flop, D, is internally connected
to a logic high. As V
becomes greater than 7.0V, comp1 will
change to a logic low state. V
will continue to increase, and
the constant current source of typically 3mA output will charge an
external storage capacitor. As V
reaches above 13.25V, the
output of comp2, will then switch from a logic high to a logic low
state. The D flip flop’s output does not change state since its
clock input is designed to trigger only on a rising edge, logic low
to logic high transition. When there is no load connected to the
output, the output voltage will continue to increase until it
reaches 21.5V which is the zener voltage minus the threshold
voltage of transistor M1. The zener voltage is typically 23V and
the threshold voltage of M1 is typically 1.5V. The zener diode is
biased by resistor R4.
V
will start to decrease when it is connected to an external load
greater than the internal constant current source, which is the
case when the PWM IC starts up. When V
falls below 13.25V,
the output of comp2 will switch from a logic low to a logic high.
The output of comp2 will clock in a logic 1 into the D flip flop
causing the D flip flop’s output, Q, to switch from a logic low to a
logic high. Transistor M2 will then be turned on pulling the gate
of transistor M1 to ground thereby turning transistor M1 off.
Transistor M1 will remain off as long as V
is greater than 7.0V.
Once V
decreases below 7.0V, comp1 will reset the D flip flop,
thereby turning transistor M2 off and transistor M1 back on.
Typical Application
Figure 1 shows a simplified typical configuration of a switch
mode power supply, SMPS, using the Supertex LR7 in the start-
up circuit.
The LR7’s V
terminal is connected to the V
line of a PWM IC,
Unitrode part #UC3844. An auxiliary winding on the transformer
is used to generate a V
voltage to power the PWM IC after start-
up. The LR7 is used to supply power for the PWM IC only during
start-up. After start-up, the LR7 turns off and the auxiliary
winding is used to supply power for the PWM IC. Figure 2 shows
the typical current and voltage waveforms at various stages from
power up to operation powered by the auxiliary winding.
Stage I
Once a voltage is applied on V
, the LR7 will start to charge the
V
capacitor, C1. The V
voltage will start to increase at a rate
limited by the internal current limiter of 3.0mA. The PWM IC is
in its start-up condition and will typically draw 0.5mA from the V
line. The V
voltage will continue to increase until it reaches the
PWM IC’s start threshold voltage of typically 16V.
Stage II
Once V
reaches 16V, the PWM IC is in its operating condition
and will draw typically 20mA depending on the operating fre-
quency and size of the switching MOSFET. The output of LR7,
V
, is internally current limited to 3.0mA. The remaining 17mA
will be supplied by C1 causing the V
voltage decrease. When
V
decreases to 13.25V, the LR7 will turn off its output thereby
reducing its input current from 3.0mA to 10’s of microamperes.
At this point, all 20mA will be supplied by C1. The PWM IC can
now operate to a minimum V
CC
voltage of typically 10V.
Once the switching MOSFET starts operating, the energy in the
primary winding is transferred to the secondary outputs and the
auxiliary winding, thereby building up V
. It is necessary to size
the V
storage capacitor, C1, such that V
increases to a
voltage greater than 10V before V
decreases to 10V. This
allows V
AUX
to supply the required operating current for the PWM IC.
Figure 1
: Simplified SMPS using LR7
(Continued on page 14-9)