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參數(shù)資料
| 型號： | LM555CIM |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 模擬波形發(fā)生器 |
| 英文描述： | PULSE, TIMER, PDSO8 |
| 封裝： | SOP-8 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 52K |
| 代理商： | LM555CIM |
LM555/I
SINGLE TIMER
APPLICATION NOTE
The application circuit shows astable mode.
Pin 6 (threshold) is tied to Pin 2 (trigger) and Pin 4 (reset) is tied to VCC (Pin 8).
The external capacitor C1 of Pin 6 and Pin 2 charges through RA, RB and discharges through RB only.
In the internal circuit of the LM555 one input of the upper comparator is the 2/3 VCC (
R
1 =R2=R3, another input if it
If it is connected Pin 6.
As soon as charging C1 is higher than 2/3 Vcc, discharge transistor Q1 turns on and C1 discharges to collector of
transistor Q1.
Therefore, the flip-flop circuit is reset and output is low.
One input of lower comparator is the 1/3 VCC, discharge transistor Q1 turn off and C1 charges through RA and RB.
Therefore, the flip-flop circuit is set and output is high.
So to say, when C1 charges through RA and R1 output is high and when C1 discharges through RB output is low.
The charge time (output is high) T1 is 0.693 (RA+RB) C1 and the discharge time (output is low) T2 is 0.693 (RB C1).
(In
= 0.693)
Thus the total period time T is given by
T=T1 +T2 = 0.693 (RA +2RB) C1.
Then the frequency of astable mode is given by
f =
=
The duty cycle is given by
D.C =
=
If you make use of the LM556 you can make two astable modes.
VCC-1/3VCC
VCC-2/3VCC
1
T
1.44
(RA + 2RB)C1
T2
T
RB
RA + 2RB
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