參數(shù)資料
型號(hào): L6740LTR
廠商: 意法半導(dǎo)體
英文描述: Hybrid controller (4+1) for AMD SVID and PVID processors
中文描述: 混合控制器(4 1對(duì)AMD SVID和PVID)處理器
文件頁(yè)數(shù): 29/44頁(yè)
文件大?。?/td> 657K
代理商: L6740LTR
L6740L
Output voltage positioning
29/44
re-starts monitoring VID after the transition has finished on the next rising-edge
available. OTFVID-clock frequency (F
OTFVID
) is 500kHz.
If the new VID code is more than 1 LSB different from the previous, the device will
execute the transition stepping the reference with the OTFVID-clock frequency F
OTFVID
until the new code has reached. The output voltage rate of change will be of 12.5mV /
4
μ
sec. = 3.125mV/
μ
sec.
Figure 11.
PVI mode - On-The-Fly VID transitions
SVI mode.
As soon as the controller receives a new valid command to set the VID level for one (or
both) of the two sections, the reference of the involved section steps up or down
according to the Target-VID with a 3mV/
μ
sec. slope (Typ). until the new VID code is
reached.
If a new valid command is issued during the transition, the device updates the Target-
VID level and performs the on-the-fly Transition up to the new code.Pre-PWROK Metal
VID
OTF-VID are not managed in this case because the
Pre-PWROK Metal VID
are stored
after EN is asserted.
V_FIX mode.
L6740L checks for SVC/SVD modifications and, once the new code is stable, it steps
the reference of both sections up or down according to the Target-VID with a
3mV/
μ
sec. slope (Typ). until the new VID code is reached.
OV, UV and PWRGOOD are masked during the transition and re-activated with a 16 clock
cycle delay after the end of the transition to prevent from false triggering.
T
OTFVID
x 4 Step VID Transition
t
t
t
V
V
V
R
R
R
R
V
VID [0:5]
Int. Reference
Vout
Tsw
V
V
R
R
R
V
V
4 x 1 Step VID Transition
Vout Slope Controlled by external
driving circuit (T
VID
)
T
VID
V
V
V
V
V
V
V
V
R
V
V
V
V
V
V
t
OTFVID Clock
Vout Slope Controlled by internal
OTFVID-Clock Oscillator
相關(guān)PDF資料
PDF描述
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