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參數(shù)資料
| 型號： | KS2501 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | OSD Processor for Monitor(用于監(jiān)視器的OSD處理器) |
| 中文描述： | OSD處理器（用于監(jiān)視器的OSD處理器的監(jiān)視器） |
| 文件頁數(shù)： | 7/26頁 |
| 文件大?。?/td> | 230K |
| 代理商： | KS2501 |
KS2501
OSD PROCESSOR FOR MONITOR
7
FUNCTIONAL DESCRIPTIONS
Data Transmission to the KS2501
According to the I
2
C protocol, the KS2501 receives the data from a micro controller. The SDA line and the SCL line
are shown in Figure 4. As shown in Figure 4, after the starting pulse, the slave address with R/W* bit and an
acknowledge are transmitted in sequence, an internal register address of the KS2501 is followed. The first 8-bit
byte is the upper 8bits of the register address. The lower 8bits of the register address are followed after the second
acknowledge. There is a data transmission format and are two address bit patterns in the KS2501 as following.
The slave address of the KS2501 is BAH(in hexadecimal).
Data Transmission Format
Row Address
->
Column Address
->
Data Byte N
->
Data Byte N+1
->
Data Byte N+2
->
....
Address Bit Pattern for Display Registers Data
(a) Row Address Bit Pattern R3 - R0: Valid Data for Row Address
(b) Column Address Bit Pattern C4 - C0: Valid Data for Column Address
A7
A6
A5
A4
After addressing, data bytes are followed as the above data transmission format. The Figure 4 describes the data
transmission with the I
2
C bus protocol.
Figure 4. SDA line and SCL line (Write Operation)
A15
A14
A13
A12
A11
A10
A9
A8
X
X
X
X
R3
R2
R1
R0
A3
A2
A1
A0
X
X
X
C4
C3
C2
C1
C0
SDA
A5
A4
LSB ADDRESS
A3
A2
A1
A0
A6
A7
A9
A8
A10
A11
A12
MB ADDRESS
A13
A14
A15
R/W
SCL
START
IIC SLAVE ADDRESS
ACK
ACK
ACK
SCL
D1
D0
D2
D3
D4
D5
DATA BYTE NLSB DATA)
D6
D7
SDA
D1
D0
D2
D3
D4
D5
DATA BYTE NMB DATA)
D6
D7
ACK
ACK
STOP
ACK
D1
D0
D2
D3
D4
D5
DATA BYTE NMB DATA)
D6
D7
. . .
. . .
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KS2508 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:OSD PROCESSOR FOR MONITOR |
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