參數(shù)資料
型號: KS2501
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: OSD Processor for Monitor(用于監(jiān)視器的OSD處理器)
中文描述: OSD處理器(用于監(jiān)視器的OSD處理器的監(jiān)視器)
文件頁數(shù): 18/26頁
文件大小: 230K
代理商: KS2501
KS2501
OSD PROCESSOR FOR MONITOR
18
Frame Control Registers-0
(Row 15, Column 00)
Bli T
(Bit 0)
Blink Time Control.
If this bit is high, the blink time is 0.5 sec. Otherwise, 1 sec.
Bli 1,Bli 0
(Bit 2,1)
Blinking Duty Control.
The blinking duty is controlled by the combination of this two bits as
following.
ScrT
(Bit 3)
Scroll Time Control.
If this bit is high, the scroll time is 0.5 sec. Otherwise, 1 sec.
Scrl
(Bit 4)
Scroll Enable.
The scroll display is activated by setting this bit high.
EN
(Bit 5)
OSD Enable.
The character display is controlled by this bit. If this bit is high,
OSD is enable. Otherwise, disable.
Erase
(Bit 6)
RAM Erasing.
RAM data are erased by setting this bit.
WSHA
(Bit 8)
Window Shadowing.
Set this bit to activate window shadowing.
WBOR
(Bit 9)
Window Bordering.
Set this bit to activate window bordering.
WC
(Bit A)
White/black selection of window border and shadow.
If this bit is high, the color of window border and shadow is white.
Otherwise, black.
HPOL
(Bit B)
Polarity of Horizontal Fly Back Signal. Positive 1, Negative 0
VPOL
(Bit C)
Polarity of Vertical Fly Back Signal. Positive 1, Negative 0
FdeT
(Bit D)
Fade-in and fade-out Time Control.
If this bit is high, the time is 0.5 sec. Otherwise, 1 sec.
Fde
(Bit E)
Fade-in and fade-out Enable.
The fade-in and fade-out effect is activated by setting this bit high.
Bit F
Reserved.
Table 4. Register Description(Continued)
Registers
Bits
Description
Bli 1
Bli 0
Blinking Duty
0
0
Blink Off
0
1
Duty 25%
1
0
Duty 50%
1
1
Duty 75%
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