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參數(shù)資料
| 型號： | KS0715 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Driver & Controller for STN LCD(STN LCD驅(qū)動器和控制器) |
| 中文描述： | 驅(qū)動程序 |
| 文件頁數(shù)： | 9/50頁 |
| 文件大小： | 255K |
| 代理商： | KS0715 |
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33COM/100SEG DRIVER & CONTROLLER FOR STN LCD
KS0715
9
Microprocessor Interface
RESETB
I
Reset input pin. When RESETB is low, initialization is executed.
PS
I
Parallel / Serial data input select input
NOTE:
In serial mode, it is impossible to read data from the on-chip RAM. DB0 to
DB5 is high impedance and E_RD and RW_WR must be fixed on high or low.
MI
I
Microprocessor interface select input in parallel mode.
MI =
“
H
”
: 6800-series MPU interface
MI =
“
L
”
: 8080-series MPU interface
CS1B
CS2
I
Chip select inputs.
Data input / output is enabled only when CS1B is low and CS2 is high. When chip select
is non-active, DB7 to DB0 will be high impedance.
RS
I
Register select input.
RS =
“
H
”
: Then data on DB7 to DB0 is display data
RS =
“
L
”
: Then data on DB7 to DB0 is control data
RW_WR
I
When interfacing to a 6800-series MPU, Read/Write is enable.
RW_WR =
“
H
”
: Read
RW_WR =
“
L
”
: Write
When interfacing to a 8080-series MPU, RW_WR is enable at low.
E_RD
I
When interfacing to a 6800-series MPU: Active High.
This is used as an enable clock input pin of the 6800-series MPU.
When interfacing to an 8080-series MPU: Active Low.
This input connects the RD signal of the 8080-series MPU. While this signal is low,
KS0715 data bus output is enabled.
DB0 to DB7
I/O
8-bit bidirectional data bus. It is connected to the standard 8-bit microprocessor data
bus. When the serial interface selected (PS =
“
L
”
):
DB7: Serial input data (SID)
DB6: Serial input clock (SCLK)
DB5 to DB0: High impedance.
When chip select is not active, DB7 to DB0 will be high impedance.
Table 2. Pin Description (Continued)
Name
I/O
Description
PS
Operating
Mode
Chip
Select
Data/
Instruction
Data
Input/Output
Read/
Write
Serial
Clock
H
Parallel
CS1B,
CS2
RS
DB7 to DB0
E_RD,
RW_WR
L
Serial
CS1B,
CS2
RS
DB7 (SID)
Write
Only
DB6
(SCLK)
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