參數(shù)資料
型號: KS0713
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Driver & Controller for STN LCD(STN LCD驅(qū)動器和控制器)
中文描述: 驅(qū)動程序
文件頁數(shù): 11/59頁
文件大小: 304K
代理商: KS0713
65COM/132SEG DRIVER & CONTROLLER FOR STN LCD
KS0713
11
MPU Interface
RESETB
I
Hardware reset input.
Initialization is performed by edge sensing (rising or falling) of the RESET signal.
PS
I
Parallel / serial data select input.
Note: In serial mode, it is impossible to read data from the on-chip RAM.
DB[5:0] is high impedance and E_RD and RW_WR must be fixed on high or low.
MI
I
Microprocessor Interface select input in parallel mode.
MI =
H
: 6800 series MPU interface
MI =
L
: 8080 series MPU interface
CS1B
CS2
I
Chip Select inputs.
Data input / output is enabled only when CS1B is low and CS2 is high. When chip select is
non-active, DB[7:0] will be High Impedance.
RS
I
Register Select input.
RS =
H
: the data on DB[7:0] is display data
RS =
L
: the data on DB[7:0] is control data
RW_WR
I
When interfacing to a 6800-series MPU, Read/Write is enabled at;
RW_WR =
H
: Read.
RW_WR =
L
: Write.
When interfacing to an 8080-series MPU, RW_WR is enabled at low.
E_RD
I
When interfacing to a 6800-series MPU: Active High.
This is used as an enable clock input pin of the 6800-series MPU.
When interfacing to an 8080-series MPU: Active Low.
This input connects the RD signal of the 8080-series MPU. While this signal is Low,
KS0713 data bus output is enabled.
DB7 to
DB0
I/O
8-bit bidirectional data bus. It is connected to the standard 8-bit microprocessor data bus.
When the serial interface selected (PS =
Low
);
DB7: Serial input data (SID)
DB6: Serial input clock (SCLK)
DB5 to DB0: High impedance.
When Chip select is not active, DB7 to DB0 will be high impedance.
Table 2. Pin Description (Continued)
Name
I/O
Description
PS
Operating
Mode
Chip
Select
Data /
Instruction
Data I/O
Read / Write
Serial
Clock
H
Parallel
CS1B,
CS2
RS
DB[7:0]
E_RD,
RW_WR
L
Serial
CS1B,
CS2
RS
DB7
(SID)
Write only
DB6
(SCLK)
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