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參數(shù)資料
| 型號(hào)： | KS0660 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Source Driver for TFT LCD(源極TFT LCD驅(qū)動(dòng)器) |
| 中文描述： | 源驅(qū)動(dòng)器的TFT液晶顯示器（TFT液晶顯示器源極驅(qū)動(dòng)器） |
| 文件頁(yè)數(shù)： | 3/15頁(yè) |
| 文件大?。?/td> | 116K |
| 代理商： | KS0660 |
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64 G/S 384CH SOURCE DRIVER
KS0660
3
PIN DESCRIPTION
Pin Symbol
Pin Name
Description
VDD1
Logic power supply
2.7V to 3.6V
VDD2
Driver power supply
6.4V to 10.0V
VSS1
Logic ground
Ground (0V)
VSS2
Driver ground
Ground (0V)
Y1~Y384
Driver Outputs
D/A converted 64G/S analog voltage is output
D0<0:5>
D1<0:5>
D2<0:5>
D3<0:5>
D4<0:5>
D5<0:5>
Display data input
The display data is input with a width of 36bits, gray scale data
(6bit)
×
6dot (R. G. B) DX0: LSB, DX5: MSB
SHL
Shift direction control
input
This pin controls the direction of shift register in cascade connection.
The shift direction of the shift register is as follows.
SHL = H: DI01 input (Y1
→
Y384), DI02 output
SHL = L: DI02 input (Y384
→
Y1), DI01 output
DI01
Right shift/start pulse
input/output
SHL=H: Used as the start pulse input pin
SHL=L: Used as the start pulse output pin
DI02
Left shift start pulse
input/output
SHL=H: Used as the start pulse output pin
SHL=L: Used as the start pulse input pin
CLK2
Shift clock input
Refer to shift clock input of the shift register.
The display data is loaded to the data register at the rising edge of CLK2.
CLK1
Latch input
Latches the contents of the data register at rising edge and transfers it to the
D/A converter. Also, after CLK1 input, clears the internal shift register contents.
After 1 pulse input on start, operates normally.
CLK1 input timing refers to the
“
Relationship between CLK1 start pulse (DI01,
DI02) and blanking period
”
of the switching characteristic waveform.
Outputs the G/S data at falling edge.
VGMA1
to VGMA10
γ
corrected
power supplies
Input the
γ
corrected power supplies from exernal source.
VDD2
VGMA1>VGMA2>VGMA3> ----- >VGMA9>VGMA10
VSS2
Keep the
γ
corrected power supplies during the gray scale voltage output.
POL
Polarity inverting input
When POL = H, the reference voltages for odd number outputs are VGMA6 to
VEMA10 and those for even number outputs are VGMA1 to VGMA5.
When POL =L, the reference voltages for odd number outputs are VGMA1 to
VGMA5 and those for even number outputs are VGMA6 to VGMA10.
DATPOL
Data inversion input
DATPOL = H: Display data is inverted
DATPOL = L: Display data is not inverted.
Detects
“
H
”
or
“
L
”
at rising edge of every CLK2.
SEL
Driving method control
input
SEL = L: Dot inversion
SEL = H: Column/line inversion
TEST
Test pin
TEST = L: Normal operation
TEST = H: TEST MODE
→
OP AMP CUT-OFF
This pin is internally pulled-down. < R
PD.
=. 30k
>
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KS0664 | Source Driver for TFT LCD(源極TFT LCD驅(qū)動(dòng)器) |
| KS0666 | 6 BIT 384 CHANNEL RSDS TFT-LCD SOURCE DRIVER |
| KS0668 | 6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER |
| KS0670 | CAP SMD TANT 16V 10% 1.0MFD |
| KS0672 | 6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KS0666 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:6 BIT 384 CHANNEL RSDS TFT-LCD SOURCE DRIVER |
| KS0668 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER |
| KS0670 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8 BIT 384 / 402 CHANNEL TFT-LCD SOURCE DRIVER |
| KS0672 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER |
| KS0676 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:6 BIT 480 CHANNEL TFT-LCD SOURCE DRIVER |
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