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參數(shù)資料
| 型號(hào)： | KM732V596L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Kx32 Synchronous SRAM |
| 中文描述： | 32Kx32同步SRAM |
| 文件頁(yè)數(shù)： | 7/16頁(yè) |
| 文件大?。?/td> | 498K |
| 代理商： | KM732V596L |
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PRELIMINARY
Rev 1.0
KM732V596A/L
32Kx32 Synchronous SRAM
- 7 -
May 1997
CAPACITANCE*
(T
A
=25
°
C, f=1MHz)
*NOTE
: Sampled not 100% tested.
Parameter
Symbol
Test Condition
Min
Max
Unit
Input Capacitance
C
IN
V
IN
=0V
-
5
pF
Output Capacitance
C
OUT
V
OUT
=0V
-
7
pF
DC ELECTRICAL CHARACTERISTICS
(V
DD
=3.3V-5%/+10%, V
DDQ
=3.3V-5%/+10%, or V
DD
=3.3V
±
5%, V
DDQ
=2.5V+0.4V/-0.13V, T
A
=0 to 70
°
C)
* V
IL
(Min)=-3.0V(Pulse Width
≤
20ns)
** In Case of I/O Pins, the Max. V
IH
=V
DDQ
+ 0.5V
Parameter
Symbol
Test Conditions
Min
Max
Unit
Input Leakage Current(except ZZ)
I
IL
V
DD
=Max,
V
IN
=V
SS
to V
DD
-2
2
μ
A
μ
A
Output Leakage Current
I
OL
Output Disabled,
V
OUT
=
V
SSQ
to V
DDQ
-2
2
Operating Current
I
CC
Device Selected, I
OUT
=0mA, ZZ
≤
V
IL
, All
Inputs=V
IL
or V
IH
Cycle Time
≥
t
CYC
min
-13
-
200
mA
-15
-
180
Standby Current
I
SB
Device deselected, I
OUT
=0mA, ZZ
≤
V
IL
,
f = Max, All Inputs
≤
0.2V or
≥
V
DD
-0.2V
-
40
mA
I
SB1
Device deselected, I
OUT
=0mA,
ZZ
≤
0.2V, f=0,
All Inputs=fixed( V
DD
-0.2V or 0.2V)
-
5
mA
L-Ver.
-
1.0
mA
I
SB2
Device deselected, I
OUT
=0mA,
ZZ
≥
V
DD
-0.2V, f=Max,
All Inputs
≤
V
IL
or
≥
V
IH
-
5
mA
L-Ver.
-
500
μ
A
Output Low Voltage(3.3V I/O)
V
OL
I
OL
=8.0mA
-
0.4
V
Output High Voltage(3.3V I/O)
V
OH
I
OH
=-4.0mA
2.4
-
V
Output Low Voltage(2.5V I/O)
V
OL
I
OL
=1.0mA
-
0.2
V
Output High Voltage(2.5V I/O)
V
OH
I
OH
=-1.0mA
2.0
-
V
Input Low Voltage(3.3V I/O)
V
IL
-0.5*
0.8
V
Input High Voltage(3.3V I/O)
V
IH
2.0
5.5**
V
Input Low Voltage(2.5V I/O)
V
IL
-0.3*
0.7
V
Input High Voltage(2.5V I/O)
V
IH
1.7
5.5**
V
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