參數(shù)資料
型號： KM718BV87
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 64Kx18-Bit Synchronous SRAM(64Kx18位同步靜態(tài) RAM)
中文描述： 64Kx18位同步SRAM（64Kx18位同步靜態(tài)內(nèi)存）
文件頁數(shù)： 6/12頁
文件大?。?/td> 276K
代理商： KM718BV87
PRELIMINARY
KM718BV87
64Kx18 Synchronous SRAM
- 6 -
Rev 1.1
April 1997
AC TIMING CHARACTERISTICS
(T
A
=0 to 70
°
C, V
CC
=5V
±
5%)
NOTE : All address inputs must meet the specified setup and hold times for all rising clock edges whenever ADSC and/or ADSP is sampled low and CS
is sampled low. All other synchronous inputs must meet the specified setup and hold times whenever this device is chip selected. Both chip
selects must be active whenever ADSC or ADSP is sampled low in order for this device to remain enabled.
Parameter
Symbol
KM718BV87-9
KM718BV87-10
KM718BV87-12
Unit
Min
Max
Min
Max
Min
Max
Cycle Time
Clock Access Time
Output Enable to Data Valid
Clock High to Output Low-Z
Output Hold from Clock High
Output Enable Low to Output Low-Z
t
CYC
t
CD
t
OE
t
LZC
t
OH
15
-
-
6
3
-
9
5
-
-
17
-
-
6
3
-
20
-
-
6
3
-
ns
ns
ns
ns
ns
10
5
-
-
12
6
-
-
t
LZOE
0
-
0
-
0
-
ns
Output Enable High to Output High-Z
t
HZOE
2
5
2
5
2
5
ns
Clock High to Output High-Z
Clock High Pulse Width
Clock Low Pulse Width
t
HZC
t
CH
-
5
6
-
-
5
6
-
-
6
6
-
ns
ns
t
CL
5
-
5
-
6
-
ns
Address Setup to Clock High
Address Status Setup to Clock High
Data Setup to Clock High
Write Setup to Clock High
Address/Advance Setup to Clock High
Chip Select Setup to Clock High
Address Hold from Clock High
Address Status Hold from Clock High
t
AS
t
SS
t
DS
t
WS
t
ADVS
t
CSS
t
AH
2.5
2.5
2.5
2.5
2.5
2.5
0.5
-
-
-
-
-
-
-
2.5
2.5
2.5
2.5
2.5
2.5
0.5
-
-
-
-
-
-
-
2.5
2.5
2.5
2.5
2.5
2.5
0.5
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
t
SH
0.5
-
0.5
-
0.5
-
ns
Data Hold from Clock High
Write Hold from Clock High
Address Advance Hold from Clock High
t
DH
t
WH
0.5
0.5
-
-
0.5
0.5
-
-
0.5
0.5
-
-
ns
ns
t
ADVH
0.5
-
0.5
-
0.5
-
ns
Chip Select Hold from Clock High
t
CSH
0.5
-
0.5
-
0.5
-
ns
Output Load(A)
Output Load(B)
(for t
LZC,
t
LZOE,
t
HZOE
& t
HZC
)
Dout
Z0=50
RL=50
VL=1.5V
Dout
353
5pF*
+3.3V
319
* Including Scope and Jig Capacitance
Fig. 1
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