參數(shù)資料
型號(hào)： K4S640832F-TL75
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL
中文描述： 64Mbit SDRAM的200萬(wàn)× 8位× 4銀行同步DRAM LVTTL
文件頁(yè)數(shù)： 3/11頁(yè)
文件大?。?/td> 118K
代理商： K4S640832F-TL75
K4S640832F
CMOS SDRAM
Rev.1.1 May. 2003
The K4S640832F is 67,108,864 bits synchronous high data
rate Dynamic RAM organized as 4 x 2,097,152 words by 8 bits,
fabricated with SAMSUNG
′
s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable burst
length and programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance mem-
ory system applications.
ORDERING INFORMATION
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (4K Cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
2M x 8Bit x 4 Banks Synchronous DRAM
Bank Select
Data Input Register
2M x 8
2M x 8
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
2M x 8
2M x 8
Timing Register
Part No.
Max Freq.
133MHz(CL=3)
Interface Package
LVTTL
K4S640832F-TC/L75
54
Samsung Electronics reserves the right to change products or specification without notice.
*
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K4S640832H-TL75 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free
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K4S640832K 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64Mb K-die SDRAM
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