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參數(shù)資料
| 型號(hào)： | K4S510832M-TC1H |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| 中文描述： | 1,600 × 8位× 4銀行同步DRAM LVTTL |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大小： | 112K |
| 代理商： | K4S510832M-TC1H |
K4S510832M
CMOS SDRAM
Rev. 0.2 Dec. 2001
Preliminary
The K4S510832M is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 16,777,216 words by 8 bits,
fabricated with SAMSUNG's high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the use
of system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth, high performance memory system
applications.
JEDEC standard 3.3V power supply
LVTTL compatible with multiplexed address
Four banks operation
MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
All inputs are sampled at the positive going edge of the system
clock.
Burst read single-bit write operation
DQM for masking
Auto & self refresh
64ms refresh period (8K cycle)
GENERAL DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
16M x 8Bit x 4 Banks Synchronous DRAM
Samsung Electronics reserves the right to
change products or specification without
notice.
*
Bank Select
Data Input Register
16M x 8
16M x 8
S
O
I
Column Decoder
Latency & Burst Length
Programming Register
A
R
R
R
C
L
L
LCKE
LRAS
LCBR
LWE
LDQM
CLK
CKE
CS
RAS
CAS
WE
DQM
LWE
LDQM
DQi
CLK
ADD
LCAS
LWCBR
16M x 8
16M x 8
Timing Register
ORDERING INFORMATION
Part No.
Max Freq.
133MHz(CL=3)
100MHz(CL=2)
100MHz(CL=3)
Interface Package
K4S510832M-TC/TL75
K4S510832M-TC/TL1H
K4S510832M-TC/TL1L
LVTTL
54pin
TSOP(II)
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| K4S510832M-TC75 | 16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832M-TL1H | 16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832M-TL1L | 16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832M-TC1L | 16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4S510832M-TC1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832MTC75 | 制造商:Samsung Semiconductor 功能描述: |
| K4S510832M-TC75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832M-TL1H | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
| K4S510832M-TL1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8bit x 4 Banks Synchronous DRAM LVTTL |
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