參數(shù)資料
型號(hào): K4J52324QC-BJ14
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 512Mbit GDDR3 SDRAM
中文描述: 512MB的GDDR3 SDRAM的
文件頁(yè)數(shù): 46/57頁(yè)
文件大小: 1246K
代理商: K4J52324QC-BJ14
- 46 -
Rev 1.0 (Mar 2005)
512M GDDR3 SDRAM
K4J52324QC-B
TRUTH TABLE - Clock Enable (CKE)
NOTES :
1. CKEn is the logic state of CKE at clock edge
n
; CKEn-1was the state of CKE at the previous clock edge.
2. Current state is the state of the DDR2(x32) immediately prior to clock edge
n
.
3. COMMANDn is the command registered at clock edge
n
, and ACTION
n
is a result of COMMAND
n
4. All state and sequence not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the t
XSA
period.
CKEn-1
CKEn
CURRENT STATE
COMMANDn
ACTIONn
NOTES
L
L
Power-Down
X
Maintain Power-Down
Self Refresh
X
Maintain Self Refresh
L
H
Power-Down
DESELECT or NOP
Exit Power-Down
Self Refresh
DESELECT or NOP
Exit Self Refresh
5
H
L
All Banks Idle
DESELECT or NOP
Precharge Power-Down Entry
Bank(s) Active
DESELECT or NOP
Active Power-Down Entry
All Banks Idle
AUTO REFRESH
Self Refresh Entry
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